llvmpipe: flush on api memorybarrier.

[mesa.git] / src / gallium / drivers / r600 / r600_state.c

diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index 9f3779f16d4c980b024e88d1d87c7a5edf9565dc..b20a9d2a2f00d78b8dd996d6b03f8091216d6ad3 100644 (file)
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -158,33 +158,37 @@ static bool r600_is_zs_format_supported(enum pipe_format format)
        return r600_translate_dbformat(format) != ~0U;
 }
 
-boolean r600_is_format_supported(struct pipe_screen *screen,
-                                enum pipe_format format,
-                                enum pipe_texture_target target,
-                                unsigned sample_count,
-                                unsigned usage)
+bool r600_is_format_supported(struct pipe_screen *screen,
+                             enum pipe_format format,
+                             enum pipe_texture_target target,
+                             unsigned sample_count,
+                             unsigned storage_sample_count,
+                             unsigned usage)
 {
        struct r600_screen *rscreen = (struct r600_screen*)screen;
        unsigned retval = 0;
 
        if (target >= PIPE_MAX_TEXTURE_TYPES) {
                R600_ERR("r600: unsupported texture type %d\n", target);
-               return FALSE;
+               return false;
        }
 
+       if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
+               return false;
+
        if (sample_count > 1) {
                if (!rscreen->has_msaa)
-                       return FALSE;
+                       return false;
 
                /* R11G11B10 is broken on R6xx. */
                if (rscreen->b.chip_class == R600 &&
                    format == PIPE_FORMAT_R11G11B10_FLOAT)
-                       return FALSE;
+                       return false;
 
                /* MSAA integer colorbuffers hang. */
                if (util_format_is_pure_integer(format) &&
                    !util_format_is_depth_or_stencil(format))
-                       return FALSE;
+                       return false;
 
                switch (sample_count) {
                case 2:
@@ -192,7 +196,7 @@ boolean r600_is_format_supported(struct pipe_screen *screen,
                case 8:
                        break;
                default:
-                       return FALSE;
+                       return false;
                }
        }
 
@@ -475,8 +479,8 @@ static void *r600_create_rs_state(struct pipe_context *ctx,
                                S_028A0C_REPEAT_COUNT(state->line_stipple_factor) : 0;
        rs->pa_cl_clip_cntl =
                S_028810_DX_CLIP_SPACE_DEF(state->clip_halfz) |
-               S_028810_ZCLIP_NEAR_DISABLE(!state->depth_clip) |
-               S_028810_ZCLIP_FAR_DISABLE(!state->depth_clip) |
+               S_028810_ZCLIP_NEAR_DISABLE(!state->depth_clip_near) |
+               S_028810_ZCLIP_FAR_DISABLE(!state->depth_clip_far) |
                S_028810_DX_LINEAR_ATTR_CLIP_ENA(1);
        if (rctx->b.chip_class == R700) {
                rs->pa_cl_clip_cntl |=
@@ -1222,22 +1226,22 @@ static void r600_set_framebuffer_state(struct pipe_context *ctx,
        rctx->framebuffer.do_update_surf_dirtiness = true;
 }
 
-static uint32_t sample_locs_2x[] = {
+static const uint32_t sample_locs_2x[] = {
        FILL_SREG(-4, 4, 4, -4, -4, 4, 4, -4),
        FILL_SREG(-4, 4, 4, -4, -4, 4, 4, -4),
 };
-static unsigned max_dist_2x = 4;
+static const unsigned max_dist_2x = 4;
 
-static uint32_t sample_locs_4x[] = {
+static const uint32_t sample_locs_4x[] = {
        FILL_SREG(-2, -2, 2, 2, -6, 6, 6, -6),
        FILL_SREG(-2, -2, 2, 2, -6, 6, 6, -6),
 };
-static unsigned max_dist_4x = 6;
-static uint32_t sample_locs_8x[] = {
+static const unsigned max_dist_4x = 6;
+static const uint32_t sample_locs_8x[] = {
        FILL_SREG(-1,  1,  1,  5,  3, -5,  5,  3),
        FILL_SREG(-7, -1, -3, -7,  7, -3, -5,  7),
 };
-static unsigned max_dist_8x = 7;
+static const unsigned max_dist_8x = 7;
 
 static void r600_get_sample_position(struct pipe_context *ctx,
                                     unsigned sample_count,
@@ -1833,18 +1837,17 @@ static void r600_emit_sampler_states(struct r600_context *rctx,
 
                /* TEX_ARRAY_OVERRIDE must be set for array textures to disable
                 * filtering between layers.
-                * Don't update TEX_ARRAY_OVERRIDE if we don't have the sampler view.
                 */
-               if (rview) {
-                       enum pipe_texture_target target = rview->base.texture->target;
-                       if (target == PIPE_TEXTURE_1D_ARRAY ||
-                           target == PIPE_TEXTURE_2D_ARRAY) {
-                               rstate->tex_sampler_words[0] |= S_03C000_TEX_ARRAY_OVERRIDE(1);
-                               texinfo->is_array_sampler[i] = true;
-                       } else {
-                               rstate->tex_sampler_words[0] &= C_03C000_TEX_ARRAY_OVERRIDE;
-                               texinfo->is_array_sampler[i] = false;
-                       }
+               enum pipe_texture_target target = PIPE_BUFFER;
+               if (rview)
+                       target = rview->base.texture->target;
+               if (target == PIPE_TEXTURE_1D_ARRAY ||
+                   target == PIPE_TEXTURE_2D_ARRAY) {
+                       rstate->tex_sampler_words[0] |= S_03C000_TEX_ARRAY_OVERRIDE(1);
+                       texinfo->is_array_sampler[i] = true;
+               } else {
+                       rstate->tex_sampler_words[0] &= C_03C000_TEX_ARRAY_OVERRIDE;
+                       texinfo->is_array_sampler[i] = false;
                }
 
                radeon_emit(cs, PKT3(PKT3_SET_SAMPLER, 3, 0));
@@ -2922,10 +2925,8 @@ static boolean r600_dma_copy_tile(struct r600_context *rctx,
                cheight = cheight > copy_height ? copy_height : cheight;
                size = (cheight * pitch) / 4;
                /* emit reloc before writing cs so that cs is always in consistent state */
-               radeon_add_to_buffer_list(&rctx->b, &rctx->b.dma, &rsrc->resource, RADEON_USAGE_READ,
-                                     RADEON_PRIO_SDMA_TEXTURE);
-               radeon_add_to_buffer_list(&rctx->b, &rctx->b.dma, &rdst->resource, RADEON_USAGE_WRITE,
-                                     RADEON_PRIO_SDMA_TEXTURE);
+               radeon_add_to_buffer_list(&rctx->b, &rctx->b.dma, &rsrc->resource, RADEON_USAGE_READ, 0);
+               radeon_add_to_buffer_list(&rctx->b, &rctx->b.dma, &rdst->resource, RADEON_USAGE_WRITE, 0);
                radeon_emit(cs, DMA_PACKET(DMA_PACKET_COPY, 1, 0, size));
                radeon_emit(cs, base >> 8);
                radeon_emit(cs, (detile << 31) | (array_mode << 27) |