* Jerome Glisse <jglisse@redhat.com>
*/
#include "r600_formats.h"
+#include "r600_shader.h"
#include "r600d.h"
#include "util/u_draw_quad.h"
}
}
-static void r600_set_vertex_buffers(struct pipe_context *ctx, unsigned count,
- const struct pipe_vertex_buffer *input)
+static void r600_set_vertex_buffers(struct pipe_context *ctx,
+ unsigned start_slot, unsigned count,
+ const struct pipe_vertex_buffer *input)
{
struct r600_context *rctx = (struct r600_context *)ctx;
struct r600_vertexbuf_state *state = &rctx->vertex_buffer_state;
- struct pipe_vertex_buffer *vb = state->vb;
+ struct pipe_vertex_buffer *vb = state->vb + start_slot;
unsigned i;
- /* This sets 1-bit for buffers with index >= count. */
- uint32_t disable_mask = ~((1ull << count) - 1);
+ uint32_t disable_mask = 0;
/* These are the new buffers set by this function. */
uint32_t new_buffer_mask = 0;
- /* Set buffers with index >= count to NULL. */
- uint32_t remaining_buffers_mask =
- rctx->vertex_buffer_state.enabled_mask & disable_mask;
-
- while (remaining_buffers_mask) {
- i = u_bit_scan(&remaining_buffers_mask);
- pipe_resource_reference(&vb[i].buffer, NULL);
- }
-
/* Set vertex buffers. */
- for (i = 0; i < count; i++) {
- if (memcmp(&input[i], &vb[i], sizeof(struct pipe_vertex_buffer))) {
- if (input[i].buffer) {
- vb[i].stride = input[i].stride;
- vb[i].buffer_offset = input[i].buffer_offset;
- pipe_resource_reference(&vb[i].buffer, input[i].buffer);
- new_buffer_mask |= 1 << i;
- } else {
- pipe_resource_reference(&vb[i].buffer, NULL);
- disable_mask |= 1 << i;
+ if (input) {
+ for (i = 0; i < count; i++) {
+ if (memcmp(&input[i], &vb[i], sizeof(struct pipe_vertex_buffer))) {
+ if (input[i].buffer) {
+ vb[i].stride = input[i].stride;
+ vb[i].buffer_offset = input[i].buffer_offset;
+ pipe_resource_reference(&vb[i].buffer, input[i].buffer);
+ new_buffer_mask |= 1 << i;
+ } else {
+ pipe_resource_reference(&vb[i].buffer, NULL);
+ disable_mask |= 1 << i;
+ }
}
}
- }
+ } else {
+ for (i = 0; i < count; i++) {
+ pipe_resource_reference(&vb[i].buffer, NULL);
+ }
+ disable_mask = ((1ull << count) - 1);
+ }
+
+ disable_mask <<= start_slot;
+ new_buffer_mask <<= start_slot;
rctx->vertex_buffer_state.enabled_mask &= ~disable_mask;
rctx->vertex_buffer_state.dirty_mask &= rctx->vertex_buffer_state.enabled_mask;
dst->views.compressed_depthtex_mask &= ~(1 << i);
}
- /* Track compressed colorbuffers for Evergreen (Cayman doesn't need this). */
- if (rctx->chip_class != CAYMAN && rtex->cmask_size && rtex->fmask_size) {
+ /* Track compressed colorbuffers. */
+ if (rtex->cmask_size && rtex->fmask_size) {
dst->views.compressed_colortex_mask |= 1 << i;
} else {
dst->views.compressed_colortex_mask &= ~(1 << i);
unsigned i;
struct r600_block *dirty_block = NULL, *next_block = NULL;
struct radeon_winsys_cs *cs = rctx->cs;
- uint64_t va;
if (!info.count && (info.indexed || !info.count_from_stream_output)) {
assert(0);
ib.index_size = 2;
}
- /* Upload the index buffer. */
- if (ib.user_buffer) {
+ /* Upload the index buffer.
+ * The upload is skipped for small index counts on little-endian machines
+ * and the indices are emitted via PKT3_DRAW_INDEX_IMMD.
+ * Note: Instanced rendering in combination with immediate indices hangs. */
+ if (ib.user_buffer && (R600_BIG_ENDIAN || info.instance_count > 1 ||
+ info.count*ib.index_size > 20)) {
u_upload_data(rctx->uploader, 0, info.count * ib.index_size,
ib.user_buffer, &ib.offset, &ib.buffer);
+ ib.user_buffer = NULL;
}
} else {
info.index_bias = info.start;
rctx->vgt_state.atom.dirty = true;
}
- /* Emit states (the function expects that we emit at most 17 dwords here). */
- r600_need_cs_space(rctx, 0, TRUE);
+ /* Emit states. */
+ r600_need_cs_space(rctx, ib.user_buffer ? 5 : 0, TRUE);
r600_flush_emit(rctx);
for (i = 0; i < R600_NUM_ATOMS; i++) {
(VGT_INDEX_32 | (R600_BIG_ENDIAN ? VGT_DMA_SWAP_32_BIT : 0)) :
(VGT_INDEX_16 | (R600_BIG_ENDIAN ? VGT_DMA_SWAP_16_BIT : 0));
- va = r600_resource_va(ctx->screen, ib.buffer);
- va += ib.offset;
- cs->buf[cs->cdw++] = PKT3(PKT3_DRAW_INDEX, 3, rctx->predicate_drawing);
- cs->buf[cs->cdw++] = va;
- cs->buf[cs->cdw++] = (va >> 32UL) & 0xFF;
- cs->buf[cs->cdw++] = info.count;
- cs->buf[cs->cdw++] = V_0287F0_DI_SRC_SEL_DMA;
- cs->buf[cs->cdw++] = PKT3(PKT3_NOP, 0, rctx->predicate_drawing);
- cs->buf[cs->cdw++] = r600_context_bo_reloc(rctx, (struct r600_resource*)ib.buffer, RADEON_USAGE_READ);
+ if (ib.user_buffer) {
+ unsigned size_bytes = info.count*ib.index_size;
+ unsigned size_dw = align(size_bytes, 4) / 4;
+ cs->buf[cs->cdw++] = PKT3(PKT3_DRAW_INDEX_IMMD, 1 + size_dw, rctx->predicate_drawing);
+ cs->buf[cs->cdw++] = info.count;
+ cs->buf[cs->cdw++] = V_0287F0_DI_SRC_SEL_IMMEDIATE;
+ memcpy(cs->buf+cs->cdw, ib.user_buffer, size_bytes);
+ cs->cdw += size_dw;
+ } else {
+ uint64_t va = r600_resource_va(ctx->screen, ib.buffer) + ib.offset;
+ cs->buf[cs->cdw++] = PKT3(PKT3_DRAW_INDEX, 3, rctx->predicate_drawing);
+ cs->buf[cs->cdw++] = va;
+ cs->buf[cs->cdw++] = (va >> 32UL) & 0xFF;
+ cs->buf[cs->cdw++] = info.count;
+ cs->buf[cs->cdw++] = V_0287F0_DI_SRC_SEL_DMA;
+ cs->buf[cs->cdw++] = PKT3(PKT3_NOP, 0, rctx->predicate_drawing);
+ cs->buf[cs->cdw++] = r600_context_bo_reloc(rctx, (struct r600_resource*)ib.buffer, RADEON_USAGE_READ);
+ }
} else {
if (info.count_from_stream_output) {
struct r600_so_target *t = (struct r600_so_target*)info.count_from_stream_output;
}
/* draw */
- util_draw_vertex_buffer(&rctx->context, NULL, buf, offset,
+ util_draw_vertex_buffer(&rctx->context, NULL, buf, rctx->blitter->vb_slot, offset,
R600_PRIM_RECTANGLE_LIST, 3, 2);
pipe_resource_reference(&buf, NULL);
}
}
}
+static bool wrap_mode_uses_border_color(unsigned wrap, bool linear_filter)
+{
+ return wrap == PIPE_TEX_WRAP_CLAMP_TO_BORDER ||
+ wrap == PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER ||
+ (linear_filter &&
+ (wrap == PIPE_TEX_WRAP_CLAMP ||
+ wrap == PIPE_TEX_WRAP_MIRROR_CLAMP));
+}
+
+bool sampler_state_needs_border_color(const struct pipe_sampler_state *state)
+{
+ bool linear_filter = state->min_img_filter != PIPE_TEX_FILTER_NEAREST ||
+ state->mag_img_filter != PIPE_TEX_FILTER_NEAREST;
+
+ return (state->border_color.ui[0] || state->border_color.ui[1] ||
+ state->border_color.ui[2] || state->border_color.ui[3]) &&
+ (wrap_mode_uses_border_color(state->wrap_s, linear_filter) ||
+ wrap_mode_uses_border_color(state->wrap_t, linear_filter) ||
+ wrap_mode_uses_border_color(state->wrap_r, linear_filter));
+}
+
/* keep this at the end of this file, please */
void r600_init_common_state_functions(struct r600_context *rctx)
{
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