r600g: limit fs_write_all shader rebuild to eg+
[mesa.git] / src / gallium / drivers / r600 / r600_state_common.c
index 3603376f738b9ffd1faa3537441fe72fbc5903ff..d9140403e5a52a8e76b2462715dba146698cfe26 100644 (file)
 #include <util/u_memory.h>
 #include <util/u_format.h>
 #include <pipebuffer/pb_buffer.h>
+#include "pipe/p_shader_tokens.h"
+#include "tgsi/tgsi_parse.h"
+#include "r600_formats.h"
 #include "r600_pipe.h"
+#include "r600d.h"
+
+static void r600_spi_update(struct r600_pipe_context *rctx);
+
+static int r600_conv_pipe_prim(unsigned pprim, unsigned *prim)
+{
+       static const int prim_conv[] = {
+               V_008958_DI_PT_POINTLIST,
+               V_008958_DI_PT_LINELIST,
+               V_008958_DI_PT_LINELOOP,
+               V_008958_DI_PT_LINESTRIP,
+               V_008958_DI_PT_TRILIST,
+               V_008958_DI_PT_TRISTRIP,
+               V_008958_DI_PT_TRIFAN,
+               V_008958_DI_PT_QUADLIST,
+               V_008958_DI_PT_QUADSTRIP,
+               V_008958_DI_PT_POLYGON,
+               -1,
+               -1,
+               -1,
+               -1
+       };
+
+       *prim = prim_conv[pprim];
+       if (*prim == -1) {
+               fprintf(stderr, "%s:%d unsupported %d\n", __func__, __LINE__, pprim);
+               return -1;
+       }
+       return 0;
+}
 
 /* common state between evergreen and r600 */
 void r600_bind_blend_state(struct pipe_context *ctx, void *state)
@@ -44,6 +77,21 @@ void r600_bind_blend_state(struct pipe_context *ctx, void *state)
        r600_context_pipe_state_set(&rctx->ctx, rstate);
 }
 
+void r600_bind_dsa_state(struct pipe_context *ctx, void *state)
+{
+       struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
+       struct r600_pipe_dsa *dsa = state;
+       struct r600_pipe_state *rstate;
+
+       if (state == NULL)
+               return;
+       rstate = &dsa->rstate;
+       rctx->states[rstate->id] = rstate;
+       rctx->alpha_ref = dsa->alpha_ref;
+       rctx->alpha_ref_dirty = true;
+       r600_context_pipe_state_set(&rctx->ctx, rstate);
+}
+
 void r600_bind_rs_state(struct pipe_context *ctx, void *state)
 {
        struct r600_pipe_rasterizer *rs = (struct r600_pipe_rasterizer *)state;
@@ -52,6 +100,8 @@ void r600_bind_rs_state(struct pipe_context *ctx, void *state)
        if (state == NULL)
                return;
 
+       rctx->clamp_vertex_color = rs->clamp_vertex_color;
+       rctx->clamp_fragment_color = rs->clamp_fragment_color;
        rctx->flatshade = rs->flatshade;
        rctx->sprite_coord_enable = rs->sprite_coord_enable;
        rctx->rasterizer = rs;
@@ -64,6 +114,8 @@ void r600_bind_rs_state(struct pipe_context *ctx, void *state)
        } else {
                r600_polygon_offset_update(rctx);
        }
+       if (rctx->ps_shader && rctx->vs_shader)
+               rctx->spi_dirty = true;
 }
 
 void r600_delete_rs_state(struct pipe_context *ctx, void *state)
@@ -89,17 +141,6 @@ void r600_sampler_view_destroy(struct pipe_context *ctx,
        FREE(resource);
 }
 
-void r600_bind_state(struct pipe_context *ctx, void *state)
-{
-       struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
-       struct r600_pipe_state *rstate = (struct r600_pipe_state *)state;
-
-       if (state == NULL)
-               return;
-       rctx->states[rstate->id] = rstate;
-       r600_context_pipe_state_set(&rctx->ctx, rstate);
-}
-
 void r600_delete_state(struct pipe_context *ctx, void *state)
 {
        struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
@@ -119,24 +160,13 @@ void r600_bind_vertex_elements(struct pipe_context *ctx, void *state)
        struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
        struct r600_vertex_element *v = (struct r600_vertex_element*)state;
 
-       /* delete previous translated vertex elements */
-       if (rctx->tran.new_velems) {
-               r600_end_vertex_translate(rctx);
-       }
-
        rctx->vertex_elements = v;
        if (v) {
+               u_vbuf_mgr_bind_vertex_elements(rctx->vbuf_mgr, state,
+                                               v->vmgr_elements);
+
                rctx->states[v->rstate.id] = &v->rstate;
                r600_context_pipe_state_set(&rctx->ctx, &v->rstate);
-               if (rctx->family >= CHIP_CEDAR) {
-                       evergreen_vertex_buffer_update(rctx);
-               } else {
-                       r600_vertex_buffer_update(rctx);
-               }
-       }
-
-       if (v) {
-//             rctx->vs_rebuild = TRUE;
        }
 }
 
@@ -152,6 +182,7 @@ void r600_delete_vertex_element(struct pipe_context *ctx, void *state)
                rctx->vertex_elements = NULL;
 
        r600_bo_reference(rctx->radeon, &v->fetch_shader, NULL);
+       u_vbuf_mgr_destroy_vertex_elements(rctx->vbuf_mgr, v->vmgr_elements);
        FREE(state);
 }
 
@@ -176,88 +207,44 @@ void r600_set_vertex_buffers(struct pipe_context *ctx, unsigned count,
                             const struct pipe_vertex_buffer *buffers)
 {
        struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
-       struct pipe_vertex_buffer *vbo;
-       unsigned max_index = (unsigned)-1;
+       int i;
 
-       if (rctx->family >= CHIP_CEDAR) {
-               for (int i = 0; i < rctx->nvertex_buffer; i++) {
-                       pipe_resource_reference(&rctx->vertex_buffer[i].buffer, NULL);
-                       evergreen_context_pipe_state_set_fs_resource(&rctx->ctx, NULL, i);
+       /* Zero states. */
+       for (i = 0; i < count; i++) {
+               if (!buffers[i].buffer) {
+                       if (rctx->family >= CHIP_CEDAR) {
+                               evergreen_context_pipe_state_set_fs_resource(&rctx->ctx, NULL, i);
+                       } else {
+                               r600_context_pipe_state_set_fs_resource(&rctx->ctx, NULL, i);
+                       }
                }
-       } else {
-               for (int i = 0; i < rctx->nvertex_buffer; i++) {
-                       pipe_resource_reference(&rctx->vertex_buffer[i].buffer, NULL);
+       }
+       for (; i < rctx->vbuf_mgr->nr_real_vertex_buffers; i++) {
+               if (rctx->family >= CHIP_CEDAR) {
+                       evergreen_context_pipe_state_set_fs_resource(&rctx->ctx, NULL, i);
+               } else {
                        r600_context_pipe_state_set_fs_resource(&rctx->ctx, NULL, i);
                }
        }
-       memcpy(rctx->vertex_buffer, buffers, sizeof(struct pipe_vertex_buffer) * count);
 
-       for (int i = 0; i < count; i++) {
-               vbo = (struct pipe_vertex_buffer*)&buffers[i];
-
-               rctx->vertex_buffer[i].buffer = NULL;
-               if (buffers[i].buffer == NULL)
-                       continue;
-               if (r600_buffer_is_user_buffer(buffers[i].buffer))
-                       rctx->any_user_vbs = TRUE;
-               pipe_resource_reference(&rctx->vertex_buffer[i].buffer, buffers[i].buffer);
-
-               /* The stride of zero means we will be fetching only the first
-                * vertex, so don't care about max_index. */
-               if (!vbo->stride)
-                       continue;
-
-               if (vbo->max_index == ~0) {
-                       vbo->max_index = (vbo->buffer->width0 - vbo->buffer_offset) / vbo->stride;
-               }
-               max_index = MIN2(vbo->max_index, max_index);
-       }
-       rctx->nvertex_buffer = count;
-       rctx->vb_max_index = max_index;
-       if (rctx->family >= CHIP_CEDAR) {
-               evergreen_vertex_buffer_update(rctx);
-       } else {
-               r600_vertex_buffer_update(rctx);
-       }
+       u_vbuf_mgr_set_vertex_buffers(rctx->vbuf_mgr, count, buffers);
 }
 
-
-#define FORMAT_REPLACE(what, withwhat) \
-       case PIPE_FORMAT_##what: *format = PIPE_FORMAT_##withwhat; break
-
 void *r600_create_vertex_elements(struct pipe_context *ctx,
                                  unsigned count,
                                  const struct pipe_vertex_element *elements)
 {
        struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
        struct r600_vertex_element *v = CALLOC_STRUCT(r600_vertex_element);
-       enum pipe_format *format;
-       int i;
 
        assert(count < 32);
        if (!v)
                return NULL;
 
        v->count = count;
-       memcpy(v->elements, elements, count * sizeof(struct pipe_vertex_element));
-
-       for (i = 0; i < count; i++) {
-               v->hw_format[i] = v->elements[i].src_format;
-               format = &v->hw_format[i];
-
-               switch (*format) {
-               FORMAT_REPLACE(R64_FLOAT,           R32_FLOAT);
-               FORMAT_REPLACE(R64G64_FLOAT,        R32G32_FLOAT);
-               FORMAT_REPLACE(R64G64B64_FLOAT,     R32G32B32_FLOAT);
-               FORMAT_REPLACE(R64G64B64A64_FLOAT,  R32G32B32A32_FLOAT);
-               default:;
-               }
-               v->incompatible_layout =
-                       v->incompatible_layout ||
-                       v->elements[i].src_format != v->hw_format[i];
-
-               v->hw_format_size[i] = align(util_format_get_blocksize(v->hw_format[i]), 4);
-       }
+       v->vmgr_elements =
+               u_vbuf_mgr_create_vertex_elements(rctx->vbuf_mgr, count,
+                                                 elements, v->elements);
 
        if (r600_vertex_elements_build_fetch_shader(rctx, v)) {
                FREE(v);
@@ -273,7 +260,9 @@ void *r600_create_shader_state(struct pipe_context *ctx,
        struct r600_pipe_shader *shader =  CALLOC_STRUCT(r600_pipe_shader);
        int r;
 
-       r =  r600_pipe_shader_create(ctx, shader, state->tokens);
+       shader->tokens = tgsi_dup_tokens(state->tokens);
+
+       r =  r600_pipe_shader_create(ctx, shader);
        if (r) {
                return NULL;
        }
@@ -289,6 +278,10 @@ void r600_bind_ps_shader(struct pipe_context *ctx, void *state)
        if (state) {
                r600_context_pipe_state_set(&rctx->ctx, &rctx->ps_shader->rstate);
        }
+       if (rctx->ps_shader && rctx->vs_shader) {
+               rctx->spi_dirty = true;
+               r600_adjust_gprs(rctx);
+       }
 }
 
 void r600_bind_vs_shader(struct pipe_context *ctx, void *state)
@@ -300,6 +293,10 @@ void r600_bind_vs_shader(struct pipe_context *ctx, void *state)
        if (state) {
                r600_context_pipe_state_set(&rctx->ctx, &rctx->vs_shader->rstate);
        }
+       if (rctx->ps_shader && rctx->vs_shader) {
+               rctx->spi_dirty = true;
+               r600_adjust_gprs(rctx);
+       }
 }
 
 void r600_delete_ps_shader(struct pipe_context *ctx, void *state)
@@ -311,6 +308,7 @@ void r600_delete_ps_shader(struct pipe_context *ctx, void *state)
                rctx->ps_shader = NULL;
        }
 
+       free(shader->tokens);
        r600_pipe_shader_destroy(ctx, shader);
        free(shader);
 }
@@ -324,6 +322,388 @@ void r600_delete_vs_shader(struct pipe_context *ctx, void *state)
                rctx->vs_shader = NULL;
        }
 
+       free(shader->tokens);
        r600_pipe_shader_destroy(ctx, shader);
        free(shader);
 }
+
+static void r600_update_alpha_ref(struct r600_pipe_context *rctx)
+{
+       unsigned alpha_ref;
+       struct r600_pipe_state rstate;
+
+       alpha_ref = rctx->alpha_ref;
+       rstate.nregs = 0;
+       if (rctx->export_16bpc)
+               alpha_ref &= ~0x1FFF;
+       r600_pipe_state_add_reg(&rstate, R_028438_SX_ALPHA_REF, alpha_ref, 0xFFFFFFFF, NULL);
+
+       r600_context_pipe_state_set(&rctx->ctx, &rstate);
+       rctx->alpha_ref_dirty = false;
+}
+
+/* FIXME optimize away spi update when it's not needed */
+static void r600_spi_block_init(struct r600_pipe_context *rctx, struct r600_pipe_state *rstate)
+{
+       int i;
+       rstate->nregs = 0;
+       rstate->id = R600_PIPE_STATE_SPI;
+       for (i = 0; i < 32; i++) {
+               r600_pipe_state_add_reg(rstate, R_028644_SPI_PS_INPUT_CNTL_0 + i * 4, 0, 0xFFFFFFFF, NULL);
+       }
+}
+
+static void r600_spi_update(struct r600_pipe_context *rctx)
+{
+       struct r600_pipe_shader *shader = rctx->ps_shader;
+       struct r600_pipe_state *rstate = &rctx->spi;
+       struct r600_shader *rshader = &shader->shader;
+       unsigned i, tmp, sid;
+
+       if (rctx->spi.id == 0)
+               r600_spi_block_init(rctx, &rctx->spi);
+
+       rstate->nregs = 0;
+       for (i = 0; i < rshader->ninput; i++) {
+               if (rshader->input[i].name == TGSI_SEMANTIC_POSITION ||
+                   rshader->input[i].name == TGSI_SEMANTIC_FACE)
+                       if (rctx->family >= CHIP_CEDAR)
+                               continue;
+                       else
+                               sid=0;
+               else
+                       sid=r600_find_vs_semantic_index(&rctx->vs_shader->shader, rshader, i);
+
+               tmp = S_028644_SEMANTIC(sid);
+
+               if (rshader->input[i].name == TGSI_SEMANTIC_COLOR ||
+                   rshader->input[i].name == TGSI_SEMANTIC_BCOLOR ||
+                   rshader->input[i].name == TGSI_SEMANTIC_POSITION) {
+                       tmp |= S_028644_FLAT_SHADE(rctx->flatshade);
+               }
+
+               if (rshader->input[i].name == TGSI_SEMANTIC_GENERIC &&
+                   rctx->sprite_coord_enable & (1 << rshader->input[i].sid)) {
+                       tmp |= S_028644_PT_SPRITE_TEX(1);
+               }
+
+               if (rctx->family < CHIP_CEDAR) {
+                       if (rshader->input[i].centroid)
+                               tmp |= S_028644_SEL_CENTROID(1);
+
+                       if (rshader->input[i].interpolate == TGSI_INTERPOLATE_LINEAR)
+                               tmp |= S_028644_SEL_LINEAR(1);
+               }
+
+               r600_pipe_state_mod_reg(rstate, tmp);
+       }
+
+       rctx->spi_dirty = false;
+       r600_context_pipe_state_set(&rctx->ctx, rstate);
+}
+
+void r600_set_constant_buffer(struct pipe_context *ctx, uint shader, uint index,
+                             struct pipe_resource *buffer)
+{
+       struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
+       struct r600_resource_buffer *rbuffer = r600_buffer(buffer);
+       struct r600_pipe_resource_state *rstate;
+       uint32_t offset;
+
+       /* Note that the state tracker can unbind constant buffers by
+        * passing NULL here.
+        */
+       if (buffer == NULL) {
+               return;
+       }
+
+       r600_upload_const_buffer(rctx, &rbuffer, &offset);
+       offset += r600_bo_offset(rbuffer->r.bo);
+
+       switch (shader) {
+       case PIPE_SHADER_VERTEX:
+               rctx->vs_const_buffer.nregs = 0;
+               r600_pipe_state_add_reg(&rctx->vs_const_buffer,
+                                       R_028180_ALU_CONST_BUFFER_SIZE_VS_0,
+                                       ALIGN_DIVUP(buffer->width0 >> 4, 16),
+                                       0xFFFFFFFF, NULL);
+               r600_pipe_state_add_reg(&rctx->vs_const_buffer,
+                                       R_028980_ALU_CONST_CACHE_VS_0,
+                                       offset >> 8, 0xFFFFFFFF, rbuffer->r.bo);
+               r600_context_pipe_state_set(&rctx->ctx, &rctx->vs_const_buffer);
+
+               rstate = &rctx->vs_const_buffer_resource[index];
+               if (!rstate->id) {
+                       if (rctx->family >= CHIP_CEDAR) {
+                               evergreen_pipe_init_buffer_resource(rctx, rstate);
+                       } else {
+                               r600_pipe_init_buffer_resource(rctx, rstate);
+                       }
+               }
+
+               if (rctx->family >= CHIP_CEDAR) {
+                       evergreen_pipe_mod_buffer_resource(rstate, &rbuffer->r, offset, 16);
+                       evergreen_context_pipe_state_set_vs_resource(&rctx->ctx, rstate, index);
+               } else {
+                       r600_pipe_mod_buffer_resource(rstate, &rbuffer->r, offset, 16);
+                       r600_context_pipe_state_set_vs_resource(&rctx->ctx, rstate, index);
+               }
+               break;
+       case PIPE_SHADER_FRAGMENT:
+               rctx->ps_const_buffer.nregs = 0;
+               r600_pipe_state_add_reg(&rctx->ps_const_buffer,
+                                       R_028140_ALU_CONST_BUFFER_SIZE_PS_0,
+                                       ALIGN_DIVUP(buffer->width0 >> 4, 16),
+                                       0xFFFFFFFF, NULL);
+               r600_pipe_state_add_reg(&rctx->ps_const_buffer,
+                                       R_028940_ALU_CONST_CACHE_PS_0,
+                                       offset >> 8, 0xFFFFFFFF, rbuffer->r.bo);
+               r600_context_pipe_state_set(&rctx->ctx, &rctx->ps_const_buffer);
+
+               rstate = &rctx->ps_const_buffer_resource[index];
+               if (!rstate->id) {
+                       if (rctx->family >= CHIP_CEDAR) {
+                               evergreen_pipe_init_buffer_resource(rctx, rstate);
+                       } else {
+                               r600_pipe_init_buffer_resource(rctx, rstate);
+                       }
+               }
+               if (rctx->family >= CHIP_CEDAR) {
+                       evergreen_pipe_mod_buffer_resource(rstate, &rbuffer->r, offset, 16);
+                       evergreen_context_pipe_state_set_ps_resource(&rctx->ctx, rstate, index);
+               } else {
+                       r600_pipe_mod_buffer_resource(rstate, &rbuffer->r, offset, 16);
+                       r600_context_pipe_state_set_ps_resource(&rctx->ctx, rstate, index);
+               }
+               break;
+       default:
+               R600_ERR("unsupported %d\n", shader);
+               return;
+       }
+
+       if (buffer != &rbuffer->r.b.b.b)
+               pipe_resource_reference((struct pipe_resource**)&rbuffer, NULL);
+}
+
+static void r600_vertex_buffer_update(struct r600_pipe_context *rctx)
+{
+       struct r600_pipe_resource_state *rstate;
+       struct r600_resource *rbuffer;
+       struct pipe_vertex_buffer *vertex_buffer;
+       unsigned i, count, offset;
+
+       if (rctx->vertex_elements->vbuffer_need_offset) {
+               /* one resource per vertex elements */
+               count = rctx->vertex_elements->count;
+       } else {
+               /* bind vertex buffer once */
+               count = rctx->vbuf_mgr->nr_real_vertex_buffers;
+       }
+
+       for (i = 0 ; i < count; i++) {
+               rstate = &rctx->fs_resource[i];
+
+               if (rctx->vertex_elements->vbuffer_need_offset) {
+                       /* one resource per vertex elements */
+                       unsigned vbuffer_index;
+                       vbuffer_index = rctx->vertex_elements->elements[i].vertex_buffer_index;
+                       vertex_buffer = &rctx->vbuf_mgr->vertex_buffer[vbuffer_index];
+                       rbuffer = (struct r600_resource*)rctx->vbuf_mgr->real_vertex_buffer[vbuffer_index];
+                       offset = rctx->vertex_elements->vbuffer_offset[i];
+               } else {
+                       /* bind vertex buffer once */
+                       vertex_buffer = &rctx->vbuf_mgr->vertex_buffer[i];
+                       rbuffer = (struct r600_resource*)rctx->vbuf_mgr->real_vertex_buffer[i];
+                       offset = 0;
+               }
+               if (vertex_buffer == NULL || rbuffer == NULL)
+                       continue;
+               offset += vertex_buffer->buffer_offset + r600_bo_offset(rbuffer->bo);
+
+               if (!rstate->id) {
+                       if (rctx->family >= CHIP_CEDAR) {
+                               evergreen_pipe_init_buffer_resource(rctx, rstate);
+                       } else {
+                               r600_pipe_init_buffer_resource(rctx, rstate);
+                       }
+               }
+
+               if (rctx->family >= CHIP_CEDAR) {
+                       evergreen_pipe_mod_buffer_resource(rstate, rbuffer, offset, vertex_buffer->stride);
+                       evergreen_context_pipe_state_set_fs_resource(&rctx->ctx, rstate, i);
+               } else {
+                       r600_pipe_mod_buffer_resource(rstate, rbuffer, offset, vertex_buffer->stride);
+                       r600_context_pipe_state_set_fs_resource(&rctx->ctx, rstate, i);
+               }
+       }
+}
+
+static int r600_shader_rebuild(struct pipe_context * ctx, struct r600_pipe_shader * shader)
+{
+       struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
+       int r;
+
+       r600_pipe_shader_destroy(ctx, shader);
+       r = r600_pipe_shader_create(ctx, shader);
+       if (r) {
+               return r;
+       }
+       r600_context_pipe_state_set(&rctx->ctx, &shader->rstate);
+
+       return 0;
+}
+
+void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
+{
+       struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
+       struct r600_resource *rbuffer;
+       struct r600_draw rdraw;
+       struct r600_drawl draw;
+       unsigned prim, mask;
+
+       if (!rctx->blit) {
+               if (rctx->have_depth_fb || rctx->have_depth_texture)
+                       r600_flush_depth_textures(rctx);
+       }
+       u_vbuf_mgr_draw_begin(rctx->vbuf_mgr, info);
+       r600_vertex_buffer_update(rctx);
+
+       draw.info = *info;
+       draw.ctx = ctx;
+       draw.index_buffer = NULL;
+       if (info->indexed && rctx->index_buffer.buffer) {
+               draw.info.start += rctx->index_buffer.offset / rctx->index_buffer.index_size;
+               pipe_resource_reference(&draw.index_buffer, rctx->index_buffer.buffer);
+
+               r600_translate_index_buffer(rctx, &draw.index_buffer,
+                                           &rctx->index_buffer.index_size,
+                                           &draw.info.start,
+                                           info->count);
+
+               draw.index_size = rctx->index_buffer.index_size;
+               draw.index_buffer_offset = draw.info.start * draw.index_size;
+               draw.info.start = 0;
+
+               if (u_vbuf_resource(draw.index_buffer)->user_ptr) {
+                       r600_upload_index_buffer(rctx, &draw);
+               }
+       } else {
+               draw.index_size = 0;
+               draw.index_buffer_offset = 0;
+               draw.info.index_bias = info->start;
+       }
+
+       if (r600_conv_pipe_prim(draw.info.mode, &prim))
+               return;
+
+       if (rctx->vs_shader->shader.clamp_color != rctx->clamp_vertex_color)
+               r600_shader_rebuild(ctx, rctx->vs_shader);
+
+       if ((rctx->ps_shader->shader.clamp_color != rctx->clamp_fragment_color) ||
+           ((rctx->family >= CHIP_CEDAR) && rctx->ps_shader->shader.fs_write_all &&
+            (rctx->ps_shader->shader.nr_cbufs != rctx->nr_cbufs)))
+               r600_shader_rebuild(ctx, rctx->ps_shader);
+
+       if (rctx->spi_dirty)
+               r600_spi_update(rctx);
+
+       if (rctx->alpha_ref_dirty)
+               r600_update_alpha_ref(rctx);
+
+       mask = (1ULL << ((unsigned)rctx->framebuffer.nr_cbufs * 4)) - 1;
+
+       if (rctx->vgt.id != R600_PIPE_STATE_VGT) {
+               rctx->vgt.id = R600_PIPE_STATE_VGT;
+               rctx->vgt.nregs = 0;
+               r600_pipe_state_add_reg(&rctx->vgt, R_008958_VGT_PRIMITIVE_TYPE, prim, 0xFFFFFFFF, NULL);
+               r600_pipe_state_add_reg(&rctx->vgt, R_028238_CB_TARGET_MASK, rctx->cb_target_mask & mask, 0xFFFFFFFF, NULL);
+               r600_pipe_state_add_reg(&rctx->vgt, R_028400_VGT_MAX_VTX_INDX, draw.info.max_index, 0xFFFFFFFF, NULL);
+               r600_pipe_state_add_reg(&rctx->vgt, R_028404_VGT_MIN_VTX_INDX, draw.info.min_index, 0xFFFFFFFF, NULL);
+               r600_pipe_state_add_reg(&rctx->vgt, R_028408_VGT_INDX_OFFSET, draw.info.index_bias, 0xFFFFFFFF, NULL);
+               r600_pipe_state_add_reg(&rctx->vgt, R_03CFF0_SQ_VTX_BASE_VTX_LOC, 0, 0xFFFFFFFF, NULL);
+               r600_pipe_state_add_reg(&rctx->vgt, R_03CFF4_SQ_VTX_START_INST_LOC, draw.info.start_instance, 0xFFFFFFFF, NULL);
+               r600_pipe_state_add_reg(&rctx->vgt, R_028814_PA_SU_SC_MODE_CNTL,
+                                       0,
+                                       S_028814_PROVOKING_VTX_LAST(1), NULL);
+
+       }
+
+       rctx->vgt.nregs = 0;
+       r600_pipe_state_mod_reg(&rctx->vgt, prim);
+       r600_pipe_state_mod_reg(&rctx->vgt, rctx->cb_target_mask & mask);
+       r600_pipe_state_mod_reg(&rctx->vgt, draw.info.max_index);
+       r600_pipe_state_mod_reg(&rctx->vgt, draw.info.min_index);
+       r600_pipe_state_mod_reg(&rctx->vgt, draw.info.index_bias);
+       r600_pipe_state_mod_reg(&rctx->vgt, 0);
+       r600_pipe_state_mod_reg(&rctx->vgt, draw.info.start_instance);
+       if (draw.info.mode == PIPE_PRIM_QUADS || draw.info.mode == PIPE_PRIM_QUAD_STRIP || draw.info.mode == PIPE_PRIM_POLYGON) {
+               r600_pipe_state_mod_reg(&rctx->vgt, S_028814_PROVOKING_VTX_LAST(1));
+       }
+
+       r600_context_pipe_state_set(&rctx->ctx, &rctx->vgt);
+
+       rdraw.vgt_num_indices = draw.info.count;
+       rdraw.vgt_num_instances = draw.info.instance_count;
+       rdraw.vgt_index_type = ((draw.index_size == 4) ? 1 : 0);
+       if (R600_BIG_ENDIAN)
+               rdraw.vgt_index_type |= (draw.index_size >> 1) << 2;
+       rdraw.vgt_draw_initiator = draw.index_size ? 0 : 2;
+       rdraw.indices = NULL;
+       if (draw.index_buffer) {
+               rbuffer = (struct r600_resource*)draw.index_buffer;
+               rdraw.indices = rbuffer->bo;
+               rdraw.indices_bo_offset = draw.index_buffer_offset;
+       }
+
+       if (rctx->family >= CHIP_CEDAR) {
+               evergreen_context_draw(&rctx->ctx, &rdraw);
+       } else {
+               r600_context_draw(&rctx->ctx, &rdraw);
+       }
+
+       if (rctx->framebuffer.zsbuf)
+       {
+               struct pipe_resource *tex = rctx->framebuffer.zsbuf->texture;
+               ((struct r600_resource_texture *)tex)->dirty_db = TRUE;
+       }
+
+       pipe_resource_reference(&draw.index_buffer, NULL);
+
+       u_vbuf_mgr_draw_end(rctx->vbuf_mgr);
+}
+
+void _r600_pipe_state_add_reg(struct r600_context *ctx,
+                             struct r600_pipe_state *state,
+                             u32 offset, u32 value, u32 mask,
+                             u32 range_id, u32 block_id,
+                             struct r600_bo *bo)
+{
+       struct r600_range *range;
+       struct r600_block *block;
+
+       range = &ctx->range[range_id];
+       block = range->blocks[block_id];
+       state->regs[state->nregs].block = block;
+       state->regs[state->nregs].id = (offset - block->start_offset) >> 2;
+
+       state->regs[state->nregs].value = value;
+       state->regs[state->nregs].mask = mask;
+       state->regs[state->nregs].bo = bo;
+
+       state->nregs++;
+       assert(state->nregs < R600_BLOCK_MAX_REG);
+}
+
+void r600_pipe_state_add_reg_noblock(struct r600_pipe_state *state,
+                                    u32 offset, u32 value, u32 mask,
+                                    struct r600_bo *bo)
+{
+       state->regs[state->nregs].id = offset;
+       state->regs[state->nregs].block = NULL;
+       state->regs[state->nregs].value = value;
+       state->regs[state->nregs].mask = mask;
+       state->regs[state->nregs].bo = bo;
+
+       state->nregs++;
+       assert(state->nregs < R600_BLOCK_MAX_REG);
+}