struct pipe_transfer *transfer = (struct pipe_transfer*)rtransfer;
struct pipe_resource *texture = transfer->resource;
- ctx->resource_copy_region(ctx, &rtransfer->staging->b.b.b,
+ ctx->resource_copy_region(ctx, &rtransfer->staging->b.b,
0, 0, 0, 0, texture, transfer->level,
&transfer->box);
}
struct pipe_resource *texture = transfer->resource;
struct pipe_box sbox;
- sbox.x = sbox.y = sbox.z = 0;
- sbox.width = transfer->box.width;
- sbox.height = transfer->box.height;
- /* XXX that might be wrong */
- sbox.depth = 1;
+ u_box_origin_2d(transfer->box.width, transfer->box.height, &sbox);
+
ctx->resource_copy_region(ctx, texture, transfer->level,
transfer->box.x, transfer->box.y, transfer->box.z,
- &rtransfer->staging->b.b.b,
+ &rtransfer->staging->b.b,
0, &sbox);
}
{
unsigned offset = rtex->offset[level];
- switch (rtex->resource.b.b.b.target) {
+ switch (rtex->resource.b.b.target) {
case PIPE_TEXTURE_3D:
case PIPE_TEXTURE_CUBE:
default:
struct r600_resource_texture *rtex,
unsigned level)
{
- struct pipe_resource *ptex = &rtex->resource.b.b.b;
+ struct pipe_resource *ptex = &rtex->resource.b.b;
unsigned nblocksx, block_align, width;
unsigned blocksize = util_format_get_blocksize(rtex->real_format);
struct r600_resource_texture *rtex,
unsigned level)
{
- struct pipe_resource *ptex = &rtex->resource.b.b.b;
+ struct pipe_resource *ptex = &rtex->resource.b.b;
unsigned height, tile_height;
height = mip_minify(ptex->height0, level);
struct r600_resource_texture *rtex,
unsigned level, unsigned array_mode)
{
- struct pipe_resource *ptex = &rtex->resource.b.b.b;
+ struct pipe_resource *ptex = &rtex->resource.b.b;
switch (array_mode) {
case V_0280A0_ARRAY_LINEAR_GENERAL:
static int r600_init_surface(struct radeon_surface *surface,
const struct pipe_resource *ptex,
- unsigned array_mode)
+ unsigned array_mode, bool is_transfer)
{
surface->npix_x = ptex->width0;
surface->npix_y = ptex->height0;
if (ptex->bind & PIPE_BIND_SCANOUT) {
surface->flags |= RADEON_SURF_SCANOUT;
}
- if (util_format_is_depth_and_stencil(ptex->format)) {
+ if ((ptex->bind & PIPE_BIND_DEPTH_STENCIL) &&
+ util_format_is_depth_and_stencil(ptex->format) && !is_transfer) {
surface->flags |= RADEON_SURF_ZBUFFER;
surface->flags |= RADEON_SURF_SBUFFER;
}
unsigned array_mode,
unsigned pitch_in_bytes_override)
{
- struct pipe_resource *ptex = &rtex->resource.b.b.b;
+ struct pipe_resource *ptex = &rtex->resource.b.b;
struct r600_screen *rscreen = (struct r600_screen*)screen;
unsigned i;
int r;
- if (util_format_is_depth_or_stencil(rtex->real_format)) {
- rtex->surface.flags |= RADEON_SURF_ZBUFFER;
- rtex->surface.flags |= RADEON_SURF_SBUFFER;
- }
-
r = rscreen->ws->surface_init(rscreen->ws, &rtex->surface);
if (r) {
return r;
struct r600_resource_texture *rtex,
unsigned array_mode)
{
- struct pipe_resource *ptex = &rtex->resource.b.b.b;
+ struct pipe_resource *ptex = &rtex->resource.b.b;
enum chip_class chipc = ((struct r600_screen*)screen)->chip_class;
unsigned size, layer_size, i, offset;
unsigned nblocksx, nblocksy;
{
struct r600_resource_texture *rtex = (struct r600_resource_texture*)ptex;
struct r600_resource *resource = &rtex->resource;
+ struct radeon_surface *surface = &rtex->surface;
struct r600_screen *rscreen = (struct r600_screen*)screen;
+ rscreen->ws->buffer_set_tiling(resource->buf,
+ NULL,
+ surface->level[0].mode >= RADEON_SURF_MODE_1D ?
+ RADEON_LAYOUT_TILED : RADEON_LAYOUT_LINEAR,
+ surface->level[0].mode >= RADEON_SURF_MODE_2D ?
+ RADEON_LAYOUT_TILED : RADEON_LAYOUT_LINEAR,
+ surface->bankw, surface->bankh,
+ surface->tile_split,
+ surface->stencil_tile_split,
+ surface->mtilea,
+ rtex->pitch_in_bytes[0]);
+
return rscreen->ws->buffer_get_handle(resource->buf,
rtex->pitch_in_bytes[0], whandle);
}
return NULL;
resource = &rtex->resource;
- resource->b.b.b = *base;
- resource->b.b.vtbl = &r600_texture_vtbl;
- pipe_reference_init(&resource->b.b.b.reference, 1);
- resource->b.b.b.screen = screen;
+ resource->b.b = *base;
+ resource->b.vtbl = &r600_texture_vtbl;
+ pipe_reference_init(&resource->b.b.reference, 1);
+ resource->b.b.screen = screen;
rtex->pitch_override = pitch_in_bytes_override;
rtex->real_format = base->format;
/* We must split depth and stencil into two separate buffers on Evergreen. */
- if (!(base->flags & R600_RESOURCE_FLAG_TRANSFER) &&
+ if ((base->bind & PIPE_BIND_DEPTH_STENCIL) &&
((struct r600_screen*)screen)->chip_class >= EVERGREEN &&
util_format_is_depth_and_stencil(base->format) &&
!rscreen->use_surface_alloc) {
}
/* only mark depth textures the HW can hit as depth textures */
- if (util_format_is_depth_or_stencil(rtex->real_format) && permit_hardware_blit(screen, base))
+ if (util_format_is_depth_or_stencil(rtex->real_format) &&
+ permit_hardware_blit(screen, base))
rtex->is_depth = true;
r600_setup_miptree(screen, rtex, array_mode);
if (rscreen->use_surface_alloc) {
rtex->surface = *surface;
- r = r600_setup_surface(screen, rtex, array_mode, pitch_in_bytes_override);
+ r = r600_setup_surface(screen, rtex, array_mode,
+ pitch_in_bytes_override);
if (r) {
FREE(rtex);
return NULL;
stencil_align = r600_get_base_alignment(screen, rtex->stencil->real_format, array_mode);
stencil_offset = align(rtex->size, stencil_align);
- for (unsigned i = 0; i <= rtex->stencil->resource.b.b.b.last_level; i++)
+ for (unsigned i = 0; i <= rtex->stencil->resource.b.b.last_level; i++)
rtex->stencil->offset[i] += stencil_offset;
rtex->size = stencil_offset + rtex->stencil->size;
/* Now create the backing buffer. */
if (!buf && alloc_bo) {
- struct pipe_resource *ptex = &rtex->resource.b.b.b;
+ struct pipe_resource *ptex = &rtex->resource.b.b;
unsigned base_align = r600_get_base_alignment(screen, ptex->format, array_mode);
if (rscreen->use_surface_alloc) {
}
}
- r = r600_init_surface(&surface, templ, array_mode);
+ r = r600_init_surface(&surface, templ, array_mode,
+ templ->flags & R600_RESOURCE_FLAG_TRANSFER);
if (r) {
return NULL;
}
else
array_mode = 0;
- r = r600_init_surface(&surface, templ, array_mode);
+ r = r600_init_surface(&surface, templ, array_mode, 0);
if (r) {
return NULL;
}
stride, 0, buf, FALSE, &surface);
}
-int r600_texture_depth_flush(struct pipe_context *ctx,
- struct pipe_resource *texture, boolean just_create)
+void r600_init_flushed_depth_texture(struct pipe_context *ctx,
+ struct pipe_resource *texture,
+ struct r600_resource_texture **staging)
{
struct r600_resource_texture *rtex = (struct r600_resource_texture*)texture;
struct pipe_resource resource;
+ struct r600_resource_texture **flushed_depth_texture = staging ?
+ staging : &rtex->flushed_depth_texture;
- if (rtex->flushed_depth_texture)
- goto out;
+ if (!staging && rtex->flushed_depth_texture)
+ return; /* it's ready */
resource.target = texture->target;
resource.format = texture->format;
resource.array_size = texture->array_size;
resource.last_level = texture->last_level;
resource.nr_samples = texture->nr_samples;
- resource.usage = PIPE_USAGE_DYNAMIC;
- resource.bind = texture->bind | PIPE_BIND_DEPTH_STENCIL;
- resource.flags = R600_RESOURCE_FLAG_TRANSFER | texture->flags;
-
- rtex->flushed_depth_texture = (struct r600_resource_texture *)ctx->screen->resource_create(ctx->screen, &resource);
- if (rtex->flushed_depth_texture == NULL) {
- R600_ERR("failed to create temporary texture to hold untiled copy\n");
- return -ENOMEM;
+ resource.usage = staging ? PIPE_USAGE_DYNAMIC : PIPE_USAGE_DEFAULT;
+ resource.bind = texture->bind & ~PIPE_BIND_DEPTH_STENCIL;
+ resource.flags = texture->flags;
+
+ if (staging)
+ resource.flags |= R600_RESOURCE_FLAG_TRANSFER;
+ else
+ rtex->dirty_db_mask = (1 << (resource.last_level+1)) - 1;
+
+ *flushed_depth_texture = (struct r600_resource_texture *)ctx->screen->resource_create(ctx->screen, &resource);
+ if (*flushed_depth_texture == NULL) {
+ R600_ERR("failed to create temporary texture to hold flushed depth\n");
+ return;
}
- ((struct r600_resource_texture *)rtex->flushed_depth_texture)->is_flushing_texture = TRUE;
-out:
- if (just_create)
- return 0;
+ (*flushed_depth_texture)->is_flushing_texture = TRUE;
- /* XXX: only do this if the depth texture has actually changed:
- */
- r600_blit_uncompress_depth(ctx, rtex);
- return 0;
+}
+
+void r600_texture_depth_flush(struct pipe_context *ctx,
+ struct pipe_resource *texture,
+ struct r600_resource_texture **staging,
+ unsigned first_level, unsigned last_level,
+ unsigned first_layer, unsigned last_layer)
+{
+ struct r600_resource_texture *rtex = (struct r600_resource_texture*)texture;
+
+ r600_init_flushed_depth_texture(ctx, texture, staging);
+
+ if (staging) {
+ if (!*staging)
+ return; /* error */
+
+ r600_blit_uncompress_depth(ctx, rtex, *staging,
+ first_level, last_level,
+ first_layer, last_layer);
+ } else {
+ if (!rtex->flushed_depth_texture)
+ return; /* error */
+
+ r600_blit_uncompress_depth(ctx, rtex, NULL,
+ first_level, last_level,
+ first_layer, last_layer);
+ }
}
/* Needs adjustment for pixelformat:
static INLINE unsigned u_box_volume( const struct pipe_box *box )
{
return box->width * box->depth * box->height;
-};
+}
struct pipe_transfer* r600_texture_get_transfer(struct pipe_context *ctx,
struct pipe_resource *texture,
struct r600_resource_texture *rtex = (struct r600_resource_texture*)texture;
struct pipe_resource resource;
struct r600_transfer *trans;
- int r;
boolean use_staging_texture = FALSE;
/* We cannot map a tiled texture directly because the data is
* the CPU is much happier reading out of cached system memory
* than uncached VRAM.
*/
- if (R600_TEX_IS_TILED(rtex, level))
+ if (R600_TEX_IS_TILED(rtex, level)) {
use_staging_texture = TRUE;
+ }
if ((usage & PIPE_TRANSFER_READ) && u_box_volume(box) > 1024)
use_staging_texture = TRUE;
/* Use a staging texture for uploads if the underlying BO is busy. */
if (!(usage & PIPE_TRANSFER_READ) &&
(rctx->ws->cs_is_buffer_referenced(rctx->cs, rtex->resource.cs_buf, RADEON_USAGE_READWRITE) ||
- rctx->ws->buffer_is_busy(rtex->resource.buf, RADEON_USAGE_READWRITE)))
+ rctx->ws->buffer_is_busy(rtex->resource.buf, RADEON_USAGE_READWRITE))) {
use_staging_texture = TRUE;
+ }
if (!permit_hardware_blit(ctx->screen, texture) ||
- (texture->flags & R600_RESOURCE_FLAG_TRANSFER))
+ (texture->flags & R600_RESOURCE_FLAG_TRANSFER)) {
use_staging_texture = FALSE;
+ }
- if (use_staging_texture && (usage & PIPE_TRANSFER_MAP_DIRECTLY))
+ if (use_staging_texture && (usage & PIPE_TRANSFER_MAP_DIRECTLY)) {
return NULL;
+ }
trans = CALLOC_STRUCT(r600_transfer);
if (trans == NULL)
*/
/* XXX: when discard is true, no need to read back from depth texture
*/
- r = r600_texture_depth_flush(ctx, texture, FALSE);
- if (r < 0) {
+ struct r600_resource_texture *staging_depth;
+
+ r600_texture_depth_flush(ctx, texture, &staging_depth,
+ level, level,
+ box->z, box->z + box->depth - 1);
+ if (!staging_depth) {
R600_ERR("failed to create temporary texture to hold untiled copy\n");
pipe_resource_reference(&trans->transfer.resource, NULL);
FREE(trans);
return NULL;
}
- trans->transfer.stride = rtex->flushed_depth_texture->pitch_in_bytes[level];
- trans->offset = r600_texture_get_offset(rtex->flushed_depth_texture, level, box->z);
+ trans->transfer.stride = staging_depth->pitch_in_bytes[level];
+ trans->offset = r600_texture_get_offset(staging_depth, level, box->z);
+ trans->staging = (struct r600_resource*)staging_depth;
return &trans->transfer;
} else if (use_staging_texture) {
resource.target = PIPE_TEXTURE_2D;
struct pipe_resource *texture = transfer->resource;
struct r600_resource_texture *rtex = (struct r600_resource_texture*)texture;
- if (rtransfer->staging) {
+ if (rtex->is_depth) {
+ if ((transfer->usage & PIPE_TRANSFER_WRITE) && rtransfer->staging) {
+ struct pipe_box sbox;
+
+ u_box_origin_2d(texture->width0, texture->height0, &sbox);
+
+ ctx->resource_copy_region(ctx, texture, 0, 0, 0, 0,
+ &rtransfer->staging->b.b, 0,
+ &sbox);
+ }
+ } else if (rtransfer->staging) {
if (transfer->usage & PIPE_TRANSFER_WRITE) {
r600_copy_from_staging_texture(ctx, rtransfer);
}
- pipe_resource_reference((struct pipe_resource**)&rtransfer->staging, NULL);
}
- if (rtex->is_depth && !rtex->is_flushing_texture) {
- if ((transfer->usage & PIPE_TRANSFER_WRITE) && rtex->flushed_depth_texture)
- r600_blit_push_depth(ctx, rtex);
- }
+ if (rtransfer->staging)
+ pipe_resource_reference((struct pipe_resource**)&rtransfer->staging, NULL);
pipe_resource_reference(&transfer->resource, NULL);
FREE(transfer);
{
struct r600_context *rctx = (struct r600_context *)ctx;
struct r600_transfer *rtransfer = (struct r600_transfer*)transfer;
- struct pb_buffer *buf;
+ struct radeon_winsys_cs_handle *buf;
+ struct r600_resource_texture *rtex =
+ (struct r600_resource_texture*)transfer->resource;
enum pipe_format format = transfer->resource->format;
unsigned offset = 0;
char *map;
+ if ((transfer->resource->bind & PIPE_BIND_GLOBAL) && transfer->resource->target == PIPE_BUFFER) {
+ return r600_compute_global_transfer_map(ctx, transfer);
+ }
+
if (rtransfer->staging) {
- buf = ((struct r600_resource *)rtransfer->staging)->buf;
+ buf = ((struct r600_resource *)rtransfer->staging)->cs_buf;
} else {
- struct r600_resource_texture *rtex = (struct r600_resource_texture*)transfer->resource;
-
- if (rtex->flushed_depth_texture)
- buf = ((struct r600_resource *)rtex->flushed_depth_texture)->buf;
- else
- buf = ((struct r600_resource *)transfer->resource)->buf;
+ buf = ((struct r600_resource *)transfer->resource)->cs_buf;
+ }
+ if (rtex->is_depth || !rtransfer->staging)
offset = rtransfer->offset +
transfer->box.y / util_format_get_blockheight(format) * transfer->stride +
transfer->box.x / util_format_get_blockwidth(format) * util_format_get_blocksize(format);
- }
if (!(map = rctx->ws->buffer_map(buf, rctx->cs, transfer->usage))) {
return NULL;
{
struct r600_transfer *rtransfer = (struct r600_transfer*)transfer;
struct r600_context *rctx = (struct r600_context*)ctx;
- struct pb_buffer *buf;
+ struct radeon_winsys_cs_handle *buf;
+
+ if ((transfer->resource->bind & PIPE_BIND_GLOBAL) && transfer->resource->target == PIPE_BUFFER) {
+ return r600_compute_global_transfer_unmap(ctx, transfer);
+ }
if (rtransfer->staging) {
- buf = ((struct r600_resource *)rtransfer->staging)->buf;
+ buf = ((struct r600_resource *)rtransfer->staging)->cs_buf;
} else {
- struct r600_resource_texture *rtex = (struct r600_resource_texture*)transfer->resource;
-
- if (rtex->flushed_depth_texture) {
- buf = ((struct r600_resource *)rtex->flushed_depth_texture)->buf;
- } else {
- buf = ((struct r600_resource *)transfer->resource)->buf;
- }
+ buf = ((struct r600_resource *)transfer->resource)->cs_buf;
}
rctx->ws->buffer_unmap(buf);
}
case PIPE_FORMAT_Z32_FLOAT:
result = FMT_32_FLOAT;
goto out_word4;
+ case PIPE_FORMAT_X32_S8X24_UINT:
+ word4 |= S_038010_NUM_FORMAT_ALL(V_038010_SQ_NUM_FORMAT_INT);
case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
result = FMT_X24_8_32_FLOAT;
goto out_word4;
}
}
+ if (desc->layout == UTIL_FORMAT_LAYOUT_SUBSAMPLED) {
+ switch (format) {
+ case PIPE_FORMAT_R8G8_B8G8_UNORM:
+ case PIPE_FORMAT_G8R8_B8R8_UNORM:
+ result = FMT_GB_GR;
+ goto out_word4;
+ case PIPE_FORMAT_G8R8_G8B8_UNORM:
+ case PIPE_FORMAT_R8G8_R8B8_UNORM:
+ result = FMT_BG_RG;
+ goto out_word4;
+ default:
+ goto out_unknown;
+ }
+ }
+
if (format == PIPE_FORMAT_R9G9B9E5_FLOAT) {
result = FMT_5_9_9_9_SHAREDEXP;
goto out_word4;
projects / mesa.git / blobdiff