#include <errno.h>
#include <unistd.h>
-#include "pipe/p_video_decoder.h"
+#include "pipe/p_video_codec.h"
#include "util/u_memory.h"
#include "util/u_video.h"
#include "vl/vl_mpeg12_decoder.h"
#include "r600_pipe.h"
+#include "radeon/radeon_video.h"
#include "radeon/radeon_uvd.h"
+#include "radeon/radeon_vce.h"
#include "r600d.h"
+#define R600_UVD_ENABLE_TILING 0
+
/**
* creates an video buffer with an UVD compatible memory layout
*/
{
struct r600_context *ctx = (struct r600_context *)pipe;
struct r600_texture *resources[VL_NUM_COMPONENTS] = {};
- struct radeon_surface* surfaces[VL_NUM_COMPONENTS] = {};
+ struct radeon_surf* surfaces[VL_NUM_COMPONENTS] = {};
struct pb_buffer **pbs[VL_NUM_COMPONENTS] = {};
const enum pipe_format *resource_formats;
struct pipe_video_buffer template;
template.width = align(tmpl->width, VL_MACROBLOCK_WIDTH);
template.height = align(tmpl->height / array_size, VL_MACROBLOCK_HEIGHT);
- vl_video_buffer_template(&templ, &template, resource_formats[0], 1, array_size, PIPE_USAGE_STATIC, 0);
- if (ctx->chip_class < EVERGREEN || tmpl->interlaced)
- templ.flags = R600_RESOURCE_FLAG_TRANSFER;
+ vl_video_buffer_template(&templ, &template, resource_formats[0], 1, array_size, PIPE_USAGE_DEFAULT, 0);
+ if (ctx->b.chip_class < EVERGREEN || tmpl->interlaced || !R600_UVD_ENABLE_TILING)
+ templ.bind = PIPE_BIND_LINEAR;
resources[0] = (struct r600_texture *)
pipe->screen->resource_create(pipe->screen, &templ);
if (!resources[0])
goto error;
if (resource_formats[1] != PIPE_FORMAT_NONE) {
- vl_video_buffer_template(&templ, &template, resource_formats[1], 1, array_size, PIPE_USAGE_STATIC, 1);
- if (ctx->chip_class < EVERGREEN || tmpl->interlaced)
- templ.flags = R600_RESOURCE_FLAG_TRANSFER;
+ vl_video_buffer_template(&templ, &template, resource_formats[1], 1, array_size, PIPE_USAGE_DEFAULT, 1);
+ if (ctx->b.chip_class < EVERGREEN || tmpl->interlaced || !R600_UVD_ENABLE_TILING)
+ templ.bind = PIPE_BIND_LINEAR;
resources[1] = (struct r600_texture *)
pipe->screen->resource_create(pipe->screen, &templ);
if (!resources[1])
}
if (resource_formats[2] != PIPE_FORMAT_NONE) {
- vl_video_buffer_template(&templ, &template, resource_formats[2], 1, array_size, PIPE_USAGE_STATIC, 2);
- if (ctx->chip_class < EVERGREEN || tmpl->interlaced)
- templ.flags = R600_RESOURCE_FLAG_TRANSFER;
+ vl_video_buffer_template(&templ, &template, resource_formats[2], 1, array_size, PIPE_USAGE_DEFAULT, 2);
+ if (ctx->b.chip_class < EVERGREEN || tmpl->interlaced || !R600_UVD_ENABLE_TILING)
+ templ.bind = PIPE_BIND_LINEAR;
resources[2] = (struct r600_texture *)
pipe->screen->resource_create(pipe->screen, &templ);
if (!resources[2])
surfaces[i] = &resources[i]->surface;
}
- ruvd_join_surfaces(ctx->ws, templ.bind, pbs, surfaces);
+ rvid_join_surfaces(ctx->b.ws, templ.bind, pbs, surfaces);
for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
if (!resources[i])
continue;
- /* recreate the CS handle */
- resources[i]->resource.cs_buf = ctx->ws->buffer_get_cs_handle(
+ /* reset the address */
+ resources[i]->resource.gpu_address = ctx->b.ws->buffer_get_virtual_address(
resources[i]->resource.buf);
}
}
/* set the decoding target buffer offsets */
-static struct radeon_winsys_cs_handle* r600_uvd_set_dtb(struct ruvd_msg *msg, struct vl_video_buffer *buf)
+static struct pb_buffer* r600_uvd_set_dtb(struct ruvd_msg *msg, struct vl_video_buffer *buf)
{
struct r600_screen *rscreen = (struct r600_screen*)buf->base.context->screen;
struct r600_texture *luma = (struct r600_texture *)buf->resources[0];
struct r600_texture *chroma = (struct r600_texture *)buf->resources[1];
msg->body.decode.dt_field_mode = buf->base.interlaced;
- msg->body.decode.dt_surf_tile_config |= RUVD_NUM_BANKS(eg_num_banks(rscreen->tiling_info.num_banks));
+ msg->body.decode.dt_surf_tile_config |= RUVD_NUM_BANKS(eg_num_banks(rscreen->b.info.r600_num_banks));
ruvd_set_dt_surfaces(msg, &luma->surface, &chroma->surface);
- return luma->resource.cs_buf;
+ return luma->resource.buf;
}
-/* create decoder */
-struct pipe_video_decoder *r600_uvd_create_decoder(struct pipe_context *context,
- enum pipe_video_profile profile,
- enum pipe_video_entrypoint entrypoint,
- enum pipe_video_chroma_format chroma_format,
- unsigned width, unsigned height,
- unsigned max_references, bool expect_chunked_decode)
+/* get the radeon resources for VCE */
+static void r600_vce_get_buffer(struct pipe_resource *resource,
+ struct pb_buffer **handle,
+ struct radeon_surf **surface)
{
- struct r600_context *ctx = (struct r600_context *)context;
+ struct r600_texture *res = (struct r600_texture *)resource;
- return ruvd_create_decoder(context, profile, entrypoint, chroma_format,
- width, height, max_references, expect_chunked_decode,
- ctx->ws, r600_uvd_set_dtb);
+ if (handle)
+ *handle = res->resource.buf;
+
+ if (surface)
+ *surface = &res->surface;
}
-int r600_uvd_get_video_param(struct pipe_screen *screen,
- enum pipe_video_profile profile,
- enum pipe_video_cap param)
+/* create decoder */
+struct pipe_video_codec *r600_uvd_create_decoder(struct pipe_context *context,
+ const struct pipe_video_codec *templat)
{
- struct r600_screen *rscreen = (struct r600_screen *)screen;
+ struct r600_context *ctx = (struct r600_context *)context;
- /* No support for MPEG4 on UVD 2.x */
- if (param == PIPE_VIDEO_CAP_SUPPORTED && rscreen->family < CHIP_CEDAR &&
- u_reduce_video_profile(profile) == PIPE_VIDEO_CODEC_MPEG4)
- return false;
+ if (templat->entrypoint == PIPE_VIDEO_ENTRYPOINT_ENCODE)
+ return rvce_create_encoder(context, templat, ctx->b.ws, r600_vce_get_buffer);
- return ruvd_get_video_param(screen, profile, param);
+ return ruvd_create_decoder(context, templat, r600_uvd_set_dtb);
}