radeonsi: don't emit PA_SC_LINE_STIPPLE after every rasterizer state change

[mesa.git] / src / gallium / drivers / r600 / r600d.h

diff --git a/src/gallium/drivers/r600/r600d.h b/src/gallium/drivers/r600/r600d.h
index 1684429ba20fd6345b9d9a1f7c858c5bfa8d3696..bce8b4ea065ca3e20597b4e737dc600378a6b80c 100644 (file)
--- a/src/gallium/drivers/r600/r600d.h
+++ b/src/gallium/drivers/r600/r600d.h
@@ -52,12 +52,18 @@
 
 
 #define PKT3_NOP                               0x10
+#define EG_PKT3_SET_BASE                       0x11 /* >= evergreen */
+#define     EG_DRAW_INDEX_INDIRECT_PATCH_TABLE_BASE 1 /* DX11 Draw_Index_Indirect Patch Table Base */
+#define EG_PKT3_INDEX_BUFFER_SIZE              0x13
 #define PKT3_INDIRECT_BUFFER_END               0x17
 #define PKT3_SET_PREDICATION                   0x20
 #define PKT3_REG_RMW                           0x21
 #define PKT3_COND_EXEC                         0x22
 #define PKT3_PRED_EXEC                         0x23
-#define PKT3_START_3D_CMDBUF                   0x24
+#define PKT3_START_3D_CMDBUF                   0x24 /* removed on evergreen */
+#define EG_PKT3_DRAW_INDIRECT                  0x24 /* >= evergreen */
+#define EG_PKT3_DRAW_INDEX_INDIRECT            0x25
+#define EG_PKT3_INDEX_BASE                     0x26
 #define PKT3_DRAW_INDEX_2                      0x27
 #define PKT3_CONTEXT_CONTROL                   0x28
 #define PKT3_DRAW_INDEX_IMMD_BE                0x29
@@ -543,6 +549,9 @@
 #define   S_028810_VTX_KILL_OR(x)                      (((x) & 0x1) << 21)
 #define   G_028810_VTX_KILL_OR(x)                      (((x) >> 21) & 0x1)
 #define   C_028810_VTX_KILL_OR                         0xFFDFFFFF
+#define   S_028810_DX_RASTERIZATION_KILL(x)            (((x) & 0x1) << 22) /* R700 only? */
+#define   G_028810_DX_RASTERIZATION_KILL(x)            (((x) >> 22) & 0x1)
+#define   C_028810_DX_RASTERIZATION_KILL               0xFFBFFFFF
 #define   S_028810_DX_LINEAR_ATTR_CLIP_ENA(x)          (((x) & 0x1) << 24)
 #define   G_028810_DX_LINEAR_ATTR_CLIP_ENA(x)          (((x) >> 24) & 0x1)
 #define   C_028810_DX_LINEAR_ATTR_CLIP_ENA             0xFEFFFFFF
@@ -838,6 +847,9 @@
 #define   S_02880C_KILL_ENABLE(x)                      (((x) & 0x1) << 6)
 #define   G_02880C_KILL_ENABLE(x)                      (((x) >> 6) & 0x1)
 #define   C_02880C_KILL_ENABLE                         0xFFFFFFBF
+#define   S_02880C_MASK_EXPORT_ENABLE(x)               (((x) & 0x1) << 8)
+#define   G_02880C_MASK_EXPORT_ENABLE(x)               (((x) >> 8) & 0x1)
+#define   C_02880C_MASK_EXPORT_ENABLE                  0xFFFFFEFF
 #define   S_02880C_DUAL_EXPORT_ENABLE(x)               (((x) & 0x1) << 9)
 #define   G_02880C_DUAL_EXPORT_ENABLE(x)               (((x) >> 9) & 0x1)
 #define   C_02880C_DUAL_EXPORT_ENABLE                  0xFFFFFDFF
@@ -886,6 +898,7 @@
 #define   S_028A40_CUT_MODE(x)                         (((x) & 0x3) << 3)
 #define   G_028A40_CUT_MODE(x)                         (((x) >> 3) & 0x3)
 #define   C_028A40_CUT_MODE                            0xFFFFFFE7
+#define R_028A50_VGT_ENHANCE                         0x028A50
 #define R_028A6C_VGT_GS_OUT_PRIM_TYPE                0x028A6C
 #define   S_028A6C_OUTPRIM_TYPE(x)                     (((x) & 0x3F) << 0)
 #define     V_028A6C_OUTPRIM_TYPE_POINTLIST            0
@@ -2318,6 +2331,12 @@
 #define   S_028818_VPORT_Z_OFFSET_ENA(x)               (((x) & 0x1) << 5)
 #define   G_028818_VPORT_Z_OFFSET_ENA(x)               (((x) >> 5 & 0x1)
 #define   C_028818_VPORT_Z_OFFSET_ENA                  0xFFFFFFDF
+#define   S_028818_VTX_XY_FMT(x)                       (((x) & 0x1) << 8)
+#define   G_028818_VTX_XY_FMT(x)                       (((x) >> 8) & 0x1)
+#define   C_028818_VTX_XY_FMT                          0xFFFFFEFF
+#define   S_028818_VTX_Z_FMT(x)                        (((x) & 0x1) << 9)
+#define   G_028818_VTX_Z_FMT(x)                        (((x) >> 9) & 0x1)
+#define   C_028818_VTX_Z_FMT                           0xFFFFFDFF
 #define   S_028818_VTX_W0_FMT(x)                       (((x) & 0x1) << 10)
 #define   G_028818_VTX_W0_FMT(x)                       (((x) >> 10) & 0x1)
 #define   C_028818_VTX_W0_FMT                          0xFFFFFBFF
@@ -3738,6 +3757,17 @@
 #define SQ_TEX_INST_SAMPLE_C_G_LB      0x1E
 #define SQ_TEX_INST_SAMPLE_C_G_LZ      0x1F
 
+#define CM_R_028AA8_IA_MULTI_VGT_PARAM                0x028AA8
+#define   S_028AA8_PRIMGROUP_SIZE(x)                   (((x) & 0xFFFF) << 0)
+#define   G_028AA8_PRIMGROUP_SIZE(x)                   (((x) >> 0) & 0xFFFF)
+#define   C_028AA8_PRIMGROUP_SIZE                      0xFFFF0000
+#define   S_028AA8_PARTIAL_VS_WAVE_ON(x)               (((x) & 0x1) << 16)
+#define   G_028AA8_PARTIAL_VS_WAVE_ON(x)               (((x) >> 16) & 0x1)
+#define   C_028AA8_PARTIAL_VS_WAVE_ON                  0xFFFEFFFF
+#define   S_028AA8_SWITCH_ON_EOP(x)                    (((x) & 0x1) << 17)
+#define   G_028AA8_SWITCH_ON_EOP(x)                    (((x) >> 17) & 0x1)
+#define   C_028AA8_SWITCH_ON_EOP                       0xFFFDFFFF
+
 /* async DMA packets */
 #define DMA_PACKET(cmd, t, s, n)       ((((cmd) & 0xF) << 28) |        \
                                        (((t) & 0x1) << 23) |           \