#include <vector>
#include <set>
#include <stack>
+#include <unordered_map>
struct nir_instr;
class ShaderFromNirProcessor : public ValuePool {
public:
ShaderFromNirProcessor(pipe_shader_type ptype, r600_pipe_shader_selector& sel,
- r600_shader& sh_info, int scratch_size, enum chip_class _chip_class);
+ r600_shader& sh_info, int scratch_size, enum chip_class _chip_class,
+ int atomic_base);
virtual ~ShaderFromNirProcessor();
void emit_instruction(Instruction *ir);
- PValue from_nir_with_fetch_constant(const nir_src& src, unsigned component);
+ PValue from_nir_with_fetch_constant(const nir_src& src, unsigned component, int channel = -1);
GPRVector vec_from_nir_with_fetch_constant(const nir_src& src, unsigned mask,
const GPRVector::Swizzle& swizzle, bool match = false);
void evaluate_spi_sid(r600_shader_io &io);
enum chip_class get_chip_class() const;
+
+ int remap_atomic_base(int base) {
+ return m_atomic_base_map[base];
+ }
+
protected:
void set_var_address(nir_deref_instr *instr);
bool emit_load_tcs_param_base(nir_intrinsic_instr* instr, int offset);
bool emit_load_local_shared(nir_intrinsic_instr* instr);
bool emit_store_local_shared(nir_intrinsic_instr* instr);
+ bool emit_atomic_local_shared(nir_intrinsic_instr* instr);
bool emit_barrier(nir_intrinsic_instr* instr);
int m_next_hwatomic_loc;
r600_pipe_shader_selector& m_sel;
+ int m_atomic_base ;
+ int m_image_count;
+
+ std::unordered_map<int, int> m_atomic_base_map;
};
}