radeon/llvm: Move lowering of SETCC node to R600ISelLowering

[mesa.git] / src / gallium / drivers / radeon / AMDGPUInstrInfo.h

diff --git a/src/gallium/drivers/radeon/AMDGPUInstrInfo.h b/src/gallium/drivers/radeon/AMDGPUInstrInfo.h
index 0f3698930a9c5af64ace6e29a0752b5d80636393..e6b79c867a84709ac967b4a9d977a4eff5534b25 100644 (file)
--- a/src/gallium/drivers/radeon/AMDGPUInstrInfo.h
+++ b/src/gallium/drivers/radeon/AMDGPUInstrInfo.h
@@ -30,23 +30,17 @@ class MachineInstrBuilder;
 class AMDGPUInstrInfo : public AMDILInstrInfo {
 private:
   AMDGPUTargetMachine & TM;
-  std::map<unsigned, unsigned> amdilToISA;
 
 public:
   explicit AMDGPUInstrInfo(AMDGPUTargetMachine &tm);
 
   virtual const AMDGPURegisterInfo &getRegisterInfo() const = 0;
 
-  /// getISAOpcode - This function takes an AMDIL opcode as an argument and
-  /// returns an equivalent ISA opcode.
-  virtual unsigned getISAOpcode(unsigned AMDILopcode) const;
-
   /// convertToISA - Convert the AMDIL MachineInstr to a supported ISA
   /// MachineInstr
   virtual MachineInstr * convertToISA(MachineInstr & MI, MachineFunction &MF,
     DebugLoc DL) const;
 
-  #include "AMDGPUInstrEnums.h.include"
 };
 
 } // End llvm namespace