radeon/llvm: Move lowering of SETCC node to R600ISelLowering

[mesa.git] / src / gallium / drivers / radeon / AMDGPUInstrInfo.h

diff --git a/src/gallium/drivers/radeon/AMDGPUInstrInfo.h b/src/gallium/drivers/radeon/AMDGPUInstrInfo.h
index 930b41e71916b7e91d301b1ca345209fad70d24e..e6b79c867a84709ac967b4a9d977a4eff5534b25 100644 (file)
--- a/src/gallium/drivers/radeon/AMDGPUInstrInfo.h
+++ b/src/gallium/drivers/radeon/AMDGPUInstrInfo.h
@@ -7,7 +7,7 @@
 //
 //===----------------------------------------------------------------------===//
 //
-// This file contains the definitoin of a TargetInstrInfo class that is common
+// This file contains the definition of a TargetInstrInfo class that is common
 // to all AMD GPUs.
 //
 //===----------------------------------------------------------------------===//
@@ -30,19 +30,17 @@ class MachineInstrBuilder;
 class AMDGPUInstrInfo : public AMDILInstrInfo {
 private:
   AMDGPUTargetMachine & TM;
-  std::map<unsigned, unsigned> amdilToISA;
 
 public:
   explicit AMDGPUInstrInfo(AMDGPUTargetMachine &tm);
 
   virtual const AMDGPURegisterInfo &getRegisterInfo() const = 0;
 
-  virtual unsigned getISAOpcode(unsigned AMDILopcode) const;
-
+  /// convertToISA - Convert the AMDIL MachineInstr to a supported ISA
+  /// MachineInstr
   virtual MachineInstr * convertToISA(MachineInstr & MI, MachineFunction &MF,
     DebugLoc DL) const;
 
-  #include "AMDGPUInstrEnums.h.include"
 };
 
 } // End llvm namespace