//
//===----------------------------------------------------------------------===//
//
-// This file contains the definitoin of a TargetInstrInfo class that is common
+// This file contains the definition of a TargetInstrInfo class that is common
// to all AMD GPUs.
//
//===----------------------------------------------------------------------===//
class AMDGPUInstrInfo : public AMDILInstrInfo {
private:
AMDGPUTargetMachine & TM;
- std::map<unsigned, unsigned> amdilToISA;
public:
explicit AMDGPUInstrInfo(AMDGPUTargetMachine &tm);
virtual const AMDGPURegisterInfo &getRegisterInfo() const = 0;
- virtual unsigned getISAOpcode(unsigned AMDILopcode) const;
-
+ /// convertToISA - Convert the AMDIL MachineInstr to a supported ISA
+ /// MachineInstr
virtual MachineInstr * convertToISA(MachineInstr & MI, MachineFunction &MF,
DebugLoc DL) const;
- #include "AMDGPUInstrEnums.h.include"
};
} // End llvm namespace