radeon/llvm: use correct intrinsic for CEIL

[mesa.git] / src / gallium / drivers / radeon / AMDGPURegisterInfo.h

diff --git a/src/gallium/drivers/radeon/AMDGPURegisterInfo.h b/src/gallium/drivers/radeon/AMDGPURegisterInfo.h
index f4492e9795d1de191a54c7055661d5348065c843..5863807a1392322e2d96791c5979a20f08bef77f 100644 (file)
--- a/src/gallium/drivers/radeon/AMDGPURegisterInfo.h
+++ b/src/gallium/drivers/radeon/AMDGPURegisterInfo.h
@@ -1,4 +1,4 @@
-//===-- AMDGPURegisterInfo.h - TODO: Add brief description -------===//
+//===-- AMDGPURegisterInfo.h - AMDGPURegisterInfo Interface -*- C++ -*-----===//
 //
 //                     The LLVM Compiler Infrastructure
 //
@@ -7,7 +7,8 @@
 //
 //===----------------------------------------------------------------------===//
 //
-// TODO: Add full description
+// This file contains the TargetRegisterInfo interface that is implemented
+// by all hw codegen targets.
 //
 //===----------------------------------------------------------------------===//
 
@@ -18,21 +19,24 @@
 
 namespace llvm {
 
-  class AMDGPUTargetMachine;
-  class TargetInstrInfo;
+class AMDGPUTargetMachine;
+class TargetInstrInfo;
 
-  struct AMDGPURegisterInfo : public AMDILRegisterInfo
-  {
-    AMDGPUTargetMachine &TM;
-    const TargetInstrInfo &TII;
+struct AMDGPURegisterInfo : public AMDILRegisterInfo
+{
+  AMDGPUTargetMachine &TM;
+  const TargetInstrInfo &TII;
 
-    AMDGPURegisterInfo(AMDGPUTargetMachine &tm, const TargetInstrInfo &tii);
+  AMDGPURegisterInfo(AMDGPUTargetMachine &tm, const TargetInstrInfo &tii);
 
-    virtual BitVector getReservedRegs(const MachineFunction &MF) const = 0;
+  virtual BitVector getReservedRegs(const MachineFunction &MF) const = 0;
 
-    virtual const TargetRegisterClass *
+  /// getISARegClass - rc is an AMDIL reg class.  This function returns the
+  /// ISA reg class that is equivalent to the given AMDIL reg class.
+  virtual const TargetRegisterClass *
     getISARegClass(const TargetRegisterClass * rc) const = 0;
-  };
+};
+
 } // End namespace llvm
 
 #endif // AMDIDSAREGISTERINFO_H_