radeon/llvm: do not convert f32 operand of select_cc node
[mesa.git] / src / gallium / drivers / radeon / AMDGPUTargetMachine.cpp
index 0601fbc0aa6dcceaa74b4d1a4ed381960790167e..2d1ca0689051a2c4702cbe799e774294804104c7 100644 (file)
@@ -29,6 +29,7 @@
 #include "llvm/Support/raw_os_ostream.h"
 #include "llvm/Transforms/IPO.h"
 #include "llvm/Transforms/Scalar.h"
+#include <llvm/CodeGen/Passes.h>
 
 using namespace llvm;
 
@@ -50,11 +51,12 @@ AMDGPUTargetMachine::AMDGPUTargetMachine(const Target &T, StringRef TT,
   FrameLowering(TargetFrameLowering::StackGrowsUp,
       Subtarget.device()->getStackAlignment(), 0),
   IntrinsicInfo(this),
+  InstrItins(&Subtarget.getInstrItineraryData()),
   mDump(false)
 
 {
   // TLInfo uses InstrInfo so it must be initialized after.
-  if (Subtarget.device()->getGeneration() <= AMDILDeviceInfo::HD6XXX) {
+  if (Subtarget.device()->getGeneration() <= AMDGPUDeviceInfo::HD6XXX) {
     InstrInfo = new R600InstrInfo(*this);
     TLInfo = new R600TargetLowering(*this);
   } else {
@@ -67,31 +69,6 @@ AMDGPUTargetMachine::~AMDGPUTargetMachine()
 {
 }
 
-bool AMDGPUTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
-                                              formatted_raw_ostream &Out,
-                                              CodeGenFileType FileType,
-                                              bool DisableVerify) {
-  // XXX: Hack here addPassesToEmitFile will fail, but this is Ok since we are
-  // only using it to access addPassesToGenerateCode()
-  bool fail = LLVMTargetMachine::addPassesToEmitFile(PM, Out, FileType,
-                                                     DisableVerify);
-  assert(fail);
-
-  const AMDILSubtarget &STM = getSubtarget<AMDILSubtarget>();
-  std::string gpu = STM.getDeviceName();
-  if (gpu == "SI") {
-    PM.add(createSICodeEmitterPass(Out));
-  } else if (Subtarget.device()->getGeneration() <= AMDILDeviceInfo::HD6XXX) {
-    PM.add(createR600CodeEmitterPass(Out));
-  } else {
-    abort();
-    return true;
-  }
-  PM.add(createGCInfoDeleter());
-
-  return false;
-}
-
 namespace {
 class AMDGPUPassConfig : public TargetPassConfig {
 public:
@@ -118,8 +95,8 @@ TargetPassConfig *AMDGPUTargetMachine::createPassConfig(PassManagerBase &PM) {
 bool
 AMDGPUPassConfig::addPreISel()
 {
-  const AMDILSubtarget &ST = TM->getSubtarget<AMDILSubtarget>();
-  if (ST.device()->getGeneration() <= AMDILDeviceInfo::HD6XXX) {
+  const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>();
+  if (ST.device()->getGeneration() <= AMDGPUDeviceInfo::HD6XXX) {
     PM->add(createR600KernelParametersPass(
                      getAMDGPUTargetMachine().getTargetData()));
   }
@@ -127,20 +104,17 @@ AMDGPUPassConfig::addPreISel()
 }
 
 bool AMDGPUPassConfig::addInstSelector() {
-  PM->add(createAMDILPeepholeOpt(*TM));
-  PM->add(createAMDILISelDag(getAMDGPUTargetMachine()));
+  PM->add(createAMDGPUPeepholeOpt(*TM));
+  PM->add(createAMDGPUISelDag(getAMDGPUTargetMachine()));
   return false;
 }
 
 bool AMDGPUPassConfig::addPreRegAlloc() {
-  const AMDILSubtarget &ST = TM->getSubtarget<AMDILSubtarget>();
+  const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>();
 
-  if (ST.device()->getGeneration() <= AMDILDeviceInfo::HD6XXX) {
-    PM->add(createR600LowerInstructionsPass(*TM));
-  } else {
+  if (ST.device()->getGeneration() > AMDGPUDeviceInfo::HD6XXX) {
     PM->add(createSIAssignInterpRegsPass(*TM));
   }
-  PM->add(createAMDGPULowerInstructionsPass(*TM));
   PM->add(createAMDGPUConvertToISAPass(*TM));
   return false;
 }
@@ -150,15 +124,21 @@ bool AMDGPUPassConfig::addPostRegAlloc() {
 }
 
 bool AMDGPUPassConfig::addPreSched2() {
+
+  addPass(IfConverterID);
   return false;
 }
 
 bool AMDGPUPassConfig::addPreEmitPass() {
-  const AMDILSubtarget &ST = TM->getSubtarget<AMDILSubtarget>();
-  PM->add(createAMDILCFGPreparationPass(*TM));
-  PM->add(createAMDILCFGStructurizerPass(*TM));
-  if (ST.device()->getGeneration() == AMDILDeviceInfo::HD7XXX) {
-    PM->add(createSIPropagateImmReadsPass(*TM));
+  PM->add(createAMDGPUCFGPreparationPass(*TM));
+  PM->add(createAMDGPUCFGStructurizerPass(*TM));
+
+  const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>();
+  if (ST.device()->getGeneration() <= AMDGPUDeviceInfo::HD6XXX) {
+    PM->add(createR600ExpandSpecialInstrsPass(*TM));
+    addPass(FinalizeMachineBundlesID);
+  } else {
+    PM->add(createSILowerLiteralConstantsPass(*TM));
   }
 
   return false;