-//===-- AMDGPUTargetMachine.cpp - TODO: Add brief description -------===//
+//===-- AMDGPUTargetMachine.cpp - TargetMachine for hw codegen targets-----===//
//
// The LLVM Compiler Infrastructure
//
//
//===----------------------------------------------------------------------===//
//
-// TODO: Add full description
+// The AMDGPU target machine contains all of the hardware specific information
+// needed to emit code for R600 and SI GPUs.
//
//===----------------------------------------------------------------------===//
#include "AMDGPUTargetMachine.h"
#include "AMDGPU.h"
-#include "AMDILGlobalManager.h"
-#include "AMDILKernelManager.h"
-#include "AMDILTargetMachine.h"
#include "R600ISelLowering.h"
#include "R600InstrInfo.h"
-#include "R600KernelParameters.h"
#include "SIISelLowering.h"
#include "SIInstrInfo.h"
#include "llvm/Analysis/Passes.h"
#include "llvm/Support/raw_os_ostream.h"
#include "llvm/Transforms/IPO.h"
#include "llvm/Transforms/Scalar.h"
+#include <llvm/CodeGen/Passes.h>
using namespace llvm;
+extern "C" void LLVMInitializeAMDGPUTarget() {
+ // Register the target
+ RegisterTargetMachine<AMDGPUTargetMachine> X(TheAMDGPUTarget);
+}
+
AMDGPUTargetMachine::AMDGPUTargetMachine(const Target &T, StringRef TT,
StringRef CPU, StringRef FS,
TargetOptions Options,
CodeGenOpt::Level OptLevel
)
:
- AMDILTargetMachine(T, TT, CPU, FS, Options, RM, CM, OptLevel),
+ LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OptLevel),
Subtarget(TT, CPU, FS),
- mGM(new AMDILGlobalManager(0 /* Debug mode */)),
- mKM(new AMDILKernelManager(this, mGM)),
+ DataLayout(Subtarget.getDataLayout()),
+ FrameLowering(TargetFrameLowering::StackGrowsUp,
+ Subtarget.device()->getStackAlignment(), 0),
+ IntrinsicInfo(this),
+ InstrItins(&Subtarget.getInstrItineraryData()),
mDump(false)
{
- /* XXX: Add these two initializations to fix a segfault, not sure if this
- * is correct. These are normally initialized in the AsmPrinter, but AMDGPU
- * does not use the asm printer */
- Subtarget.setGlobalManager(mGM);
- Subtarget.setKernelManager(mKM);
- /* TLInfo uses InstrInfo so it must be initialized after. */
- if (Subtarget.device()->getGeneration() <= AMDILDeviceInfo::HD6XXX) {
+ // TLInfo uses InstrInfo so it must be initialized after.
+ if (Subtarget.device()->getGeneration() <= AMDGPUDeviceInfo::HD6XXX) {
InstrInfo = new R600InstrInfo(*this);
TLInfo = new R600TargetLowering(*this);
} else {
AMDGPUTargetMachine::~AMDGPUTargetMachine()
{
- delete mGM;
- delete mKM;
-}
-
-bool AMDGPUTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
- formatted_raw_ostream &Out,
- CodeGenFileType FileType,
- bool DisableVerify) {
- /* XXX: Hack here addPassesToEmitFile will fail, but this is Ok since we are
- * only using it to access addPassesToGenerateCode() */
- bool fail = LLVMTargetMachine::addPassesToEmitFile(PM, Out, FileType,
- DisableVerify);
- assert(fail);
-
- const AMDILSubtarget &STM = getSubtarget<AMDILSubtarget>();
- std::string gpu = STM.getDeviceName();
- if (gpu == "SI") {
- PM.add(createSICodeEmitterPass(Out));
- } else if (Subtarget.device()->getGeneration() <= AMDILDeviceInfo::HD6XXX) {
- PM.add(createR600CodeEmitterPass(Out));
- } else {
- abort();
- return true;
- }
- PM.add(createGCInfoDeleter());
-
- return false;
}
namespace {
bool
AMDGPUPassConfig::addPreISel()
{
- const AMDILSubtarget &ST = TM->getSubtarget<AMDILSubtarget>();
- if (ST.device()->getGeneration() <= AMDILDeviceInfo::HD6XXX) {
- PM.add(createR600KernelParametersPass(
- getAMDGPUTargetMachine().getTargetData()));
- }
return false;
}
bool AMDGPUPassConfig::addInstSelector() {
- PM.add(createAMDILBarrierDetect(*TM));
- PM.add(createAMDILPrintfConvert(*TM));
- PM.add(createAMDILInlinePass(*TM));
- PM.add(createAMDILPeepholeOpt(*TM));
- PM.add(createAMDILISelDag(getAMDGPUTargetMachine()));
+ PM->add(createAMDGPUPeepholeOpt(*TM));
+ PM->add(createAMDGPUISelDag(getAMDGPUTargetMachine()));
return false;
}
bool AMDGPUPassConfig::addPreRegAlloc() {
- const AMDILSubtarget &ST = TM->getSubtarget<AMDILSubtarget>();
-
- if (ST.device()->getGeneration() == AMDILDeviceInfo::HD7XXX) {
- PM.add(createSIInitMachineFunctionInfoPass(*TM));
- }
+ const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>();
- PM.add(createAMDGPUReorderPreloadInstructionsPass(*TM));
- if (ST.device()->getGeneration() <= AMDILDeviceInfo::HD6XXX) {
- PM.add(createR600LowerShaderInstructionsPass(*TM));
- PM.add(createR600LowerInstructionsPass(*TM));
- } else {
- PM.add(createSILowerShaderInstructionsPass(*TM));
- PM.add(createSIAssignInterpRegsPass(*TM));
- PM.add(createSIConvertToISAPass(*TM));
+ if (ST.device()->getGeneration() > AMDGPUDeviceInfo::HD6XXX) {
+ PM->add(createSIAssignInterpRegsPass(*TM));
}
- PM.add(createAMDGPUConvertToISAPass(*TM));
+ PM->add(createAMDGPUConvertToISAPass(*TM));
return false;
}
}
bool AMDGPUPassConfig::addPreSched2() {
+
+ addPass(IfConverterID);
return false;
}
bool AMDGPUPassConfig::addPreEmitPass() {
- const AMDILSubtarget &ST = TM->getSubtarget<AMDILSubtarget>();
- PM.add(createAMDILCFGPreparationPass(*TM));
- PM.add(createAMDILCFGStructurizerPass(*TM));
- if (ST.device()->getGeneration() == AMDILDeviceInfo::HD7XXX) {
- PM.add(createSIPropagateImmReadsPass(*TM));
+ PM->add(createAMDGPUCFGPreparationPass(*TM));
+ PM->add(createAMDGPUCFGStructurizerPass(*TM));
+
+ const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>();
+ if (ST.device()->getGeneration() <= AMDGPUDeviceInfo::HD6XXX) {
+ PM->add(createR600ExpandSpecialInstrsPass(*TM));
+ addPass(FinalizeMachineBundlesID);
+ } else {
+ PM->add(createSILowerLiteralConstantsPass(*TM));
+ // piglit is unreliable (VM protection faults, GPU lockups) with this pass:
+ //PM->add(createSILowerFlowControlPass(*TM));
}
- PM.add(createAMDILIOExpansion(*TM));
return false;
}