gallium/radeon: just get num_tile_pipes from the winsys
[mesa.git] / src / gallium / drivers / radeon / Makefile.sources
index be8ec0ba8ddc445576bf93098ced3da365a3c46e..eb171f7da5f76db64f908f27a7a7f0e38e7ac7fb 100644 (file)
@@ -1,74 +1,33 @@
-
-GENERATED_SOURCES := \
-       R600ShaderPatterns.td           \
-       R600RegisterInfo.td             \
-       AMDGPUInstrEnums.td             \
-       SIRegisterInfo.td               \
-       SIRegisterGetHWRegNum.inc               \
-       AMDILGenRegisterInfo.inc        \
-       AMDILGenInstrInfo.inc           \
-       AMDILGenAsmWriter.inc           \
-       AMDILGenDAGISel.inc             \
-       AMDILGenCallingConv.inc         \
-       AMDILGenSubtargetInfo.inc               \
-       AMDILGenEDInfo.inc              \
-       AMDILGenIntrinsics.inc          \
-       AMDILGenCodeEmitter.inc \
-       AMDGPUInstrEnums.h.include      \
-       AMDGPUInstrEnums.include
-
-CPP_SOURCES := \
-       AMDIL7XXDevice.cpp              \
-       AMDILCFGStructurizer.cpp        \
-       AMDILDevice.cpp                 \
-       AMDILDeviceInfo.cpp             \
-       AMDILEvergreenDevice.cpp        \
-       AMDILELFWriterInfo.cpp          \
-       AMDILFrameLowering.cpp          \
-       AMDILInstrInfo.cpp              \
-       AMDILIntrinsicInfo.cpp          \
-       AMDILISelDAGToDAG.cpp           \
-       AMDILISelLowering.cpp           \
-       AMDILLiteralManager.cpp         \
-       AMDILMachineFunctionInfo.cpp    \
-       AMDILMachinePeephole.cpp        \
-       AMDILMCCodeEmitter.cpp          \
-       AMDILModuleInfo.cpp             \
-       AMDILNIDevice.cpp               \
-       AMDILPeepholeOptimizer.cpp      \
-       AMDILRegisterInfo.cpp           \
-       AMDILSIDevice.cpp               \
-       AMDILSubtarget.cpp              \
-       AMDILTargetMachine.cpp          \
-       AMDILUtilityFunctions.cpp       \
-       AMDGPUTargetMachine.cpp         \
-       AMDGPUISelLowering.cpp          \
-       AMDGPUConvertToISA.cpp          \
-       AMDGPULowerInstructions.cpp             \
-       AMDGPULowerShaderInstructions.cpp       \
-       AMDGPUReorderPreloadInstructions.cpp    \
-       AMDGPUInstrInfo.cpp             \
-       AMDGPURegisterInfo.cpp          \
-       AMDGPUUtil.cpp                  \
-       R600CodeEmitter.cpp             \
-       R600ISelLowering.cpp            \
-       R600InstrInfo.cpp               \
-       R600KernelParameters.cpp        \
-       R600LowerInstructions.cpp       \
-       R600LowerShaderInstructions.cpp \
-       R600RegisterInfo.cpp            \
-       SIAssignInterpRegs.cpp          \
-       SICodeEmitter.cpp               \
-       SIInstrInfo.cpp                 \
-       SIISelLowering.cpp              \
-       SILowerShaderInstructions.cpp   \
-       SIMachineFunctionInfo.cpp       \
-       SIPropagateImmReads.cpp         \
-       SIRegisterInfo.cpp              \
-       MCTargetDesc/AMDILMCAsmInfo.cpp \
-       MCTargetDesc/AMDILMCTargetDesc.cpp      \
-       TargetInfo/AMDILTargetInfo.cpp  \
-       radeon_llvm_emit.cpp
-
 C_SOURCES := \
+       cayman_msaa.c \
+       r600_buffer_common.c \
+       r600_cs.h \
+       r600d_common.h \
+       r600_gpu_load.c \
+       r600_perfcounter.c \
+       r600_pipe_common.c \
+       r600_pipe_common.h \
+       r600_query.c \
+       r600_query.h \
+       r600_streamout.c \
+       r600_texture.c \
+       radeon_uvd.c \
+       radeon_uvd.h \
+       radeon_vce_40_2_2.c \
+       radeon_vce_50.c \
+       radeon_vce_52.c \
+       radeon_vce.c \
+       radeon_vce.h \
+       radeon_video.c \
+       radeon_video.h \
+       radeon_winsys.h
+
+LLVM_C_FILES := \
+       radeon_elf_util.c \
+       radeon_elf_util.h \
+       radeon_llvm_emit.c \
+       radeon_llvm_emit.h \
+       radeon_llvm.h \
+       radeon_llvm_util.c \
+       radeon_llvm_util.h \
        radeon_setup_tgsi_llvm.c