radeonsi: Move interpolation mode check into the compiler

[mesa.git] / src / gallium / drivers / radeon / SIAssignInterpRegs.cpp

diff --git a/src/gallium/drivers/radeon/SIAssignInterpRegs.cpp b/src/gallium/drivers/radeon/SIAssignInterpRegs.cpp
index 447eff6f5acc003aecd21fdd66877db01e17467d..0e36e6b8b785d5e56881ee62e5c2e51f787f3c90 100644 (file)
--- a/src/gallium/drivers/radeon/SIAssignInterpRegs.cpp
+++ b/src/gallium/drivers/radeon/SIAssignInterpRegs.cpp
@@ -52,6 +52,7 @@ public:
 char SIAssignInterpRegsPass::ID = 0;
 
 #define INTERP_VALUES 16
+#define REQUIRED_VALUE_MAX_INDEX 7
 
 struct interp_info {
   bool enabled;
@@ -92,16 +93,26 @@ bool SIAssignInterpRegsPass::runOnMachineFunction(MachineFunction &MF)
     return false;
   }
   MachineRegisterInfo &MRI = MF.getRegInfo();
+  bool ForceEnable = true;
 
   /* First pass, mark the interpolation values that are used. */
   for (unsigned interp_idx = 0; interp_idx < INTERP_VALUES; interp_idx++) {
     for (unsigned reg_idx = 0; reg_idx < InterpUse[interp_idx].reg_count;
                                                                reg_idx++) {
-      InterpUse[interp_idx].enabled =
+      InterpUse[interp_idx].enabled = InterpUse[interp_idx].enabled ||
                             !MRI.use_empty(InterpUse[interp_idx].regs[reg_idx]);
+      if (InterpUse[interp_idx].enabled &&
+          interp_idx <= REQUIRED_VALUE_MAX_INDEX) {
+        ForceEnable = false;
+      }
     }
   }
 
+  // At least one interpolation mode must be enabled or else the GPU will hang.
+  if (ForceEnable) {
+    InterpUse[0].enabled = true;
+  }
+
   unsigned used_vgprs = 0;
 
   /* Second pass, replace with VGPRs. */