radeon/llvm: Lower loads from USE_SGPR adddress space during DAG lowering

[mesa.git] / src / gallium / drivers / radeon / SIInstructions.td

diff --git a/src/gallium/drivers/radeon/SIInstructions.td b/src/gallium/drivers/radeon/SIInstructions.td
index aad2ade10cefa483b978dc4861c12511a206027e..152d7356a91af93cfb0340d7f9673044ff068100 100644 (file)
--- a/src/gallium/drivers/radeon/SIInstructions.td
+++ b/src/gallium/drivers/radeon/SIInstructions.td
@@ -7,19 +7,6 @@
 //
 //===----------------------------------------------------------------------===//
 
-def load_user_sgpr : PatFrag<(ops node:$ptr),
-  (load node:$ptr),
-  [{
-    const Value *Src = cast<LoadSDNode>(N)->getSrcValue();
-    if (Src) {
-      PointerType * PT = dyn_cast<PointerType>(Src->getType());
-      return PT && PT->getAddressSpace() == AMDGPUAS::USER_SGPR_ADDRESS;
-    }
-    return false;
-  }]
->;
-
-
 def isSI : Predicate<"Subtarget.device()"
                             "->getGeneration() == AMDGPUDeviceInfo::HD7XXX">;
 
@@ -956,20 +943,6 @@ def SI_INTERP_CONST : InstSI <
                                                  imm:$attr, SReg_32:$params))]
 >;
 
-def USE_SGPR_32 : InstSI <
-  (outs SReg_32:$dst),
-  (ins i32imm:$src0),
-  "USE_SGPR_32",
-  [(set (i32 SReg_32:$dst), (load_user_sgpr imm:$src0))]
->;
-
-def USE_SGPR_64 : InstSI <
-  (outs SReg_64:$dst),
-  (ins i32imm:$src0),
-  "USE_SGPR_64",
-  [(set (i64 SReg_64:$dst), (load_user_sgpr imm:$src0))]
->;
-
 } // end usesCustomInserter 
 
 // SI Psuedo branch instructions.  These are used by the CFG structurizer pass