Android: generate symlinks for all enabled gallium drivers
[mesa.git] / src / gallium / drivers / radeon / r600_buffer_common.c
index b2289e26f72b11080de0c2f90ee1630bd0fec1b8..40d763bd9f5a272089e27cc76db5ce1777130a11 100644 (file)
@@ -110,6 +110,8 @@ void r600_init_resource_fields(struct r600_common_screen *rscreen,
        res->bo_size = size;
        res->bo_alignment = alignment;
        res->flags = 0;
+       res->texture_handle_allocated = false;
+       res->image_handle_allocated = false;
 
        switch (res->b.b.usage) {
        case PIPE_USAGE_STREAM:
@@ -130,7 +132,6 @@ void r600_init_resource_fields(struct r600_common_screen *rscreen,
                        res->flags |= RADEON_FLAG_GTT_WC;
                        break;
                }
-               res->flags |= RADEON_FLAG_CPU_ACCESS;
                /* fall through */
        case PIPE_USAGE_DEFAULT:
        case PIPE_USAGE_IMMUTABLE:
@@ -156,15 +157,12 @@ void r600_init_resource_fields(struct r600_common_screen *rscreen,
                if (rscreen->info.drm_major == 2 &&
                    rscreen->info.drm_minor < 40)
                        res->domains = RADEON_DOMAIN_GTT;
-               else if (res->domains & RADEON_DOMAIN_VRAM)
-                       res->flags |= RADEON_FLAG_CPU_ACCESS;
        }
 
        /* Tiled textures are unmappable. Always put them in VRAM. */
        if ((res->b.b.target != PIPE_BUFFER && !rtex->surface.is_linear) ||
            res->flags & R600_RESOURCE_FLAG_UNMAPPABLE) {
                res->domains = RADEON_DOMAIN_VRAM;
-               res->flags &= ~RADEON_FLAG_CPU_ACCESS;
                res->flags |= RADEON_FLAG_NO_CPU_ACCESS |
                         RADEON_FLAG_GTT_WC;
        }
@@ -178,12 +176,17 @@ void r600_init_resource_fields(struct r600_common_screen *rscreen,
         */
        if (!rscreen->info.has_dedicated_vram &&
            (rscreen->info.drm_major < 3 || rscreen->info.drm_minor < 6) &&
-           res->domains == RADEON_DOMAIN_VRAM)
+           res->domains == RADEON_DOMAIN_VRAM) {
                res->domains = RADEON_DOMAIN_VRAM_GTT;
+               res->flags &= ~RADEON_FLAG_NO_CPU_ACCESS; /* disallowed with VRAM_GTT */
+       }
 
        if (rscreen->debug_flags & DBG_NO_WC)
                res->flags &= ~RADEON_FLAG_GTT_WC;
 
+       if (res->b.b.bind & PIPE_BIND_SHARED)
+               res->flags |= RADEON_FLAG_NO_SUBALLOC;
+
        /* Set expected VRAM and GART usage for the buffer. */
        res->vram_usage = 0;
        res->gart_usage = 0;
@@ -238,6 +241,7 @@ static void r600_buffer_destroy(struct pipe_screen *screen,
 {
        struct r600_resource *rbuffer = r600_resource(buf);
 
+       threaded_resource_deinit(buf);
        util_range_destroy(&rbuffer->valid_buffer_range);
        pb_reference(&rbuffer->buf, NULL);
        FREE(rbuffer);
@@ -248,7 +252,7 @@ r600_invalidate_buffer(struct r600_common_context *rctx,
                       struct r600_resource *rbuffer)
 {
        /* Shared buffers can't be reallocated. */
-       if (rbuffer->is_shared)
+       if (rbuffer->b.is_shared)
                return false;
 
        /* Sparse buffers can't be reallocated. */
@@ -258,7 +262,7 @@ r600_invalidate_buffer(struct r600_common_context *rctx,
        /* In AMD_pinned_memory, the user pointer association only gets
         * broken when the buffer is explicitly re-allocated.
         */
-       if (rctx->ws->buffer_is_user_ptr(rbuffer->buf))
+       if (rbuffer->b.is_user_ptr)
                return false;
 
        /* Check if mapping this buffer would cause waiting for the GPU. */
@@ -272,6 +276,29 @@ r600_invalidate_buffer(struct r600_common_context *rctx,
        return true;
 }
 
+/* Replace the storage of dst with src. */
+void r600_replace_buffer_storage(struct pipe_context *ctx,
+                                struct pipe_resource *dst,
+                                struct pipe_resource *src)
+{
+       struct r600_common_context *rctx = (struct r600_common_context *)ctx;
+       struct r600_resource *rdst = r600_resource(dst);
+       struct r600_resource *rsrc = r600_resource(src);
+       uint64_t old_gpu_address = rdst->gpu_address;
+
+       pb_reference(&rdst->buf, rsrc->buf);
+       rdst->gpu_address = rsrc->gpu_address;
+
+       assert(rdst->vram_usage == rsrc->vram_usage);
+       assert(rdst->gart_usage == rsrc->gart_usage);
+       assert(rdst->bo_size == rsrc->bo_size);
+       assert(rdst->bo_alignment == rsrc->bo_alignment);
+       assert(rdst->domains == rsrc->domains);
+       assert(rdst->flags == rsrc->flags);
+
+       rctx->rebind_buffer(ctx, dst, old_gpu_address);
+}
+
 void r600_invalidate_resource(struct pipe_context *ctx,
                              struct pipe_resource *resource)
 {
@@ -292,18 +319,24 @@ static void *r600_buffer_get_transfer(struct pipe_context *ctx,
                                      unsigned offset)
 {
        struct r600_common_context *rctx = (struct r600_common_context*)ctx;
-       struct r600_transfer *transfer = slab_alloc(&rctx->pool_transfers);
-
-       transfer->transfer.resource = NULL;
-       pipe_resource_reference(&transfer->transfer.resource, resource);
-       transfer->transfer.level = 0;
-       transfer->transfer.usage = usage;
-       transfer->transfer.box = *box;
-       transfer->transfer.stride = 0;
-       transfer->transfer.layer_stride = 0;
+       struct r600_transfer *transfer;
+
+       if (usage & TC_TRANSFER_MAP_THREADED_UNSYNC)
+               transfer = slab_alloc(&rctx->pool_transfers_unsync);
+       else
+               transfer = slab_alloc(&rctx->pool_transfers);
+
+       transfer->b.b.resource = NULL;
+       pipe_resource_reference(&transfer->b.b.resource, resource);
+       transfer->b.b.level = 0;
+       transfer->b.b.usage = usage;
+       transfer->b.b.box = *box;
+       transfer->b.b.stride = 0;
+       transfer->b.b.layer_stride = 0;
+       transfer->b.staging = NULL;
        transfer->offset = offset;
        transfer->staging = staging;
-       *ptransfer = &transfer->transfer;
+       *ptransfer = &transfer->b.b;
        return data;
 }
 
@@ -343,14 +376,15 @@ static void *r600_buffer_transfer_map(struct pipe_context *ctx,
         *
         * So don't ever use staging buffers.
         */
-       if (rscreen->ws->buffer_is_user_ptr(rbuffer->buf))
+       if (rbuffer->b.is_user_ptr)
                usage |= PIPE_TRANSFER_PERSISTENT;
 
        /* See if the buffer range being mapped has never been initialized,
         * in which case it can be mapped unsynchronized. */
-       if (!(usage & PIPE_TRANSFER_UNSYNCHRONIZED) &&
+       if (!(usage & (PIPE_TRANSFER_UNSYNCHRONIZED |
+                      TC_TRANSFER_MAP_IGNORE_VALID_RANGE)) &&
            usage & PIPE_TRANSFER_WRITE &&
-           !rbuffer->is_shared &&
+           !rbuffer->b.is_shared &&
            !util_ranges_intersect(&rbuffer->valid_buffer_range, box->x, box->x + box->width)) {
                usage |= PIPE_TRANSFER_UNSYNCHRONIZED;
        }
@@ -362,7 +396,8 @@ static void *r600_buffer_transfer_map(struct pipe_context *ctx,
        }
 
        if (usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE &&
-           !(usage & PIPE_TRANSFER_UNSYNCHRONIZED)) {
+           !(usage & (PIPE_TRANSFER_UNSYNCHRONIZED |
+                      TC_TRANSFER_MAP_NO_INVALIDATE))) {
                assert(usage & PIPE_TRANSFER_WRITE);
 
                if (r600_invalidate_buffer(rctx, rbuffer)) {
@@ -418,6 +453,7 @@ static void *r600_buffer_transfer_map(struct pipe_context *ctx,
                 (rbuffer->flags & RADEON_FLAG_SPARSE)) {
                struct r600_resource *staging;
 
+               assert(!(usage & TC_TRANSFER_MAP_THREADED_UNSYNC));
                staging = (struct r600_resource*) pipe_buffer_create(
                                ctx->screen, 0, PIPE_USAGE_STAGING,
                                box->width + (box->x % R600_MAP_BUFFER_ALIGNMENT));
@@ -482,8 +518,10 @@ static void r600_buffer_flush_region(struct pipe_context *ctx,
                                     struct pipe_transfer *transfer,
                                     const struct pipe_box *rel_box)
 {
-       if (transfer->usage & (PIPE_TRANSFER_WRITE |
-                              PIPE_TRANSFER_FLUSH_EXPLICIT)) {
+       unsigned required_usage = PIPE_TRANSFER_WRITE |
+                                 PIPE_TRANSFER_FLUSH_EXPLICIT;
+
+       if ((transfer->usage & required_usage) == required_usage) {
                struct pipe_box box;
 
                u_box_1d(transfer->box.x + rel_box->x, rel_box->width, &box);
@@ -501,10 +539,12 @@ static void r600_buffer_transfer_unmap(struct pipe_context *ctx,
            !(transfer->usage & PIPE_TRANSFER_FLUSH_EXPLICIT))
                r600_buffer_do_flush_region(ctx, transfer, &transfer->box);
 
-       if (rtransfer->staging)
-               r600_resource_reference(&rtransfer->staging, NULL);
-
+       r600_resource_reference(&rtransfer->staging, NULL);
+       assert(rtransfer->b.staging == NULL); /* for threaded context only */
        pipe_resource_reference(&transfer->resource, NULL);
+
+       /* Don't use pool_transfers_unsync. We are always in the driver
+        * thread. */
        slab_free(&rctx->pool_transfers, transfer);
 }
 
@@ -551,11 +591,13 @@ r600_alloc_buffer_struct(struct pipe_screen *screen,
        rbuffer->b.b.next = NULL;
        pipe_reference_init(&rbuffer->b.b.reference, 1);
        rbuffer->b.b.screen = screen;
+
        rbuffer->b.vtbl = &r600_buffer_vtbl;
+       threaded_resource_init(&rbuffer->b.b);
+
        rbuffer->buf = NULL;
        rbuffer->bind_history = 0;
        rbuffer->TC_L2_dirty = false;
-       rbuffer->is_shared = false;
        util_range_init(&rbuffer->valid_buffer_range);
        return rbuffer;
 }
@@ -569,8 +611,6 @@ struct pipe_resource *r600_buffer_create(struct pipe_screen *screen,
 
        r600_init_resource_fields(rscreen, rbuffer, templ->width0, alignment);
 
-       if (templ->bind & PIPE_BIND_SHARED)
-               rbuffer->flags |= RADEON_FLAG_HANDLE;
        if (templ->flags & PIPE_RESOURCE_FLAG_SPARSE)
                rbuffer->flags |= RADEON_FLAG_SPARSE;
 
@@ -613,7 +653,9 @@ r600_buffer_from_user_memory(struct pipe_screen *screen,
 
        rbuffer->domains = RADEON_DOMAIN_GTT;
        rbuffer->flags = 0;
+       rbuffer->b.is_user_ptr = true;
        util_range_add(&rbuffer->valid_buffer_range, 0, templ->width0);
+       util_range_add(&rbuffer->b.valid_buffer_range, 0, templ->width0);
 
        /* Convert a user pointer to a buffer. */
        rbuffer->buf = ws->buffer_from_ptr(ws, user_memory, templ->width0);