radeonsi: drop the DRAW_PREAMBLE packet on Polaris
[mesa.git] / src / gallium / drivers / radeon / r600_cs.h
index 157d56c14c6fd70e1817d99e7be6f4dc3c1a6325..72a91bf56aabf6b25f9b998d95bd656def57fb37 100644 (file)
@@ -97,6 +97,17 @@ static inline void radeon_set_context_reg(struct radeon_winsys_cs *cs, unsigned
        radeon_emit(cs, value);
 }
 
+static inline void radeon_set_context_reg_idx(struct radeon_winsys_cs *cs,
+                                             unsigned reg, unsigned idx,
+                                             unsigned value)
+{
+       assert(reg >= R600_CONTEXT_REG_OFFSET);
+       assert(cs->current.cdw + 3 <= cs->current.max_dw);
+       radeon_emit(cs, PKT3(PKT3_SET_CONTEXT_REG, 1, 0));
+       radeon_emit(cs, (reg - R600_CONTEXT_REG_OFFSET) >> 2 | (idx << 28));
+       radeon_emit(cs, value);
+}
+
 static inline void radeon_set_sh_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num)
 {
        assert(reg >= SI_SH_REG_OFFSET && reg < SI_SH_REG_END);
@@ -125,4 +136,15 @@ static inline void radeon_set_uconfig_reg(struct radeon_winsys_cs *cs, unsigned
        radeon_emit(cs, value);
 }
 
+static inline void radeon_set_uconfig_reg_idx(struct radeon_winsys_cs *cs,
+                                             unsigned reg, unsigned idx,
+                                             unsigned value)
+{
+       assert(reg >= CIK_UCONFIG_REG_OFFSET && reg < CIK_UCONFIG_REG_END);
+       assert(cs->current.cdw + 3 <= cs->current.max_dw);
+       radeon_emit(cs, PKT3(PKT3_SET_UCONFIG_REG, 1, 0));
+       radeon_emit(cs, (reg - CIK_UCONFIG_REG_OFFSET) >> 2 | (idx << 28));
+       radeon_emit(cs, value);
+}
+
 #endif