winsys/amdgpu: remove the dcc_enable surface flag
[mesa.git] / src / gallium / drivers / radeon / r600_pipe_common.c
index 3f1c0f0eae97061cf3dc1e51d81b6a7974fa974a..0ad36849645039f550790505e9d77f66eb231713 100644 (file)
@@ -78,6 +78,9 @@ void r600_draw_rectangle(struct blitter_context *blitter,
         * I guess the 4th one is derived from the first 3.
         * The vertex specification should match u_blitter's vertex element state. */
        u_upload_alloc(rctx->uploader, 0, sizeof(float) * 24, &offset, &buf, (void**)&vb);
+       if (!buf)
+               return;
+
        vb[0] = x1;
        vb[1] = y1;
        vb[2] = depth;
@@ -231,7 +234,7 @@ bool r600_common_context_init(struct r600_common_context *rctx,
                rctx->max_db = 4;
 
        rctx->b.transfer_map = u_transfer_map_vtbl;
-       rctx->b.transfer_flush_region = u_default_transfer_flush_region;
+       rctx->b.transfer_flush_region = u_transfer_flush_region_vtbl;
        rctx->b.transfer_unmap = u_transfer_unmap_vtbl;
        rctx->b.transfer_inline_write = u_default_transfer_inline_write;
         rctx->b.memory_barrier = r600_memory_barrier;
@@ -355,6 +358,10 @@ static const struct debug_named_value common_debug_options[] = {
        { "switch_on_eop", DBG_SWITCH_ON_EOP, "Program WD/IA to switch on end-of-packet." },
        { "forcedma", DBG_FORCE_DMA, "Use asynchronous DMA for all operations when possible." },
        { "precompile", DBG_PRECOMPILE, "Compile one shader variant at shader creation." },
+       { "nowc", DBG_NO_WC, "Disable GTT write combining" },
+       { "check_vm", DBG_CHECK_VM, "Check VM faults and dump debug info." },
+       { "nodcc", DBG_NO_DCC, "Disable DCC." },
+       { "nodccclear", DBG_NO_DCC_CLEAR, "Disable DCC fast clear." },
 
        DEBUG_NAMED_VALUE_END /* must be last */
 };
@@ -407,6 +414,11 @@ static const char* r600_get_chip_name(struct r600_common_screen *rscreen)
        case CHIP_KABINI: return "AMD KABINI";
        case CHIP_HAWAII: return "AMD HAWAII";
        case CHIP_MULLINS: return "AMD MULLINS";
+       case CHIP_TONGA: return "AMD TONGA";
+       case CHIP_ICELAND: return "AMD ICELAND";
+       case CHIP_CARRIZO: return "AMD CARRIZO";
+       case CHIP_FIJI: return "AMD FIJI";
+       case CHIP_STONEY: return "AMD STONEY";
        default: return "AMD unknown";
        }
 }
@@ -526,10 +538,15 @@ const char *r600_get_llvm_processor_name(enum radeon_family family)
        case CHIP_KAVERI: return "kaveri";
        case CHIP_HAWAII: return "hawaii";
        case CHIP_MULLINS:
-#if HAVE_LLVM >= 0x0305
                return "mullins";
+       case CHIP_TONGA: return "tonga";
+       case CHIP_ICELAND: return "iceland";
+       case CHIP_CARRIZO: return "carrizo";
+       case CHIP_FIJI: return "fiji";
+#if HAVE_LLVM <= 0x0307
+       case CHIP_STONEY: return "carrizo";
 #else
-               return "kabini";
+       case CHIP_STONEY: return "stoney";
 #endif
        default: return "";
        }
@@ -712,17 +729,19 @@ static int r600_get_driver_query_info(struct pipe_screen *screen,
                 PIPE_DRIVER_QUERY_RESULT_TYPE_CUMULATIVE},
                {"VRAM-usage", R600_QUERY_VRAM_USAGE, {rscreen->info.vram_size}, PIPE_DRIVER_QUERY_TYPE_BYTES},
                {"GTT-usage", R600_QUERY_GTT_USAGE, {rscreen->info.gart_size}, PIPE_DRIVER_QUERY_TYPE_BYTES},
-               {"temperature", R600_QUERY_GPU_TEMPERATURE, {100}},
+               {"GPU-load", R600_QUERY_GPU_LOAD, {100}},
+               {"temperature", R600_QUERY_GPU_TEMPERATURE, {125}},
                {"shader-clock", R600_QUERY_CURRENT_GPU_SCLK, {0}, PIPE_DRIVER_QUERY_TYPE_HZ},
                {"memory-clock", R600_QUERY_CURRENT_GPU_MCLK, {0}, PIPE_DRIVER_QUERY_TYPE_HZ},
-               {"GPU-load", R600_QUERY_GPU_LOAD, {100}}
        };
        unsigned num_queries;
 
        if (rscreen->info.drm_major == 2 && rscreen->info.drm_minor >= 42)
                num_queries = Elements(list);
+       else if (rscreen->info.drm_major == 3)
+               num_queries = Elements(list) - 3;
        else
-               num_queries = 9;
+               num_queries = Elements(list) - 4;
 
        if (!info)
                return num_queries;
@@ -881,10 +900,11 @@ bool r600_common_screen_init(struct r600_common_screen *rscreen,
 
        ws->query_info(ws, &rscreen->info);
 
-       if (HAVE_LLVM)
-               snprintf(llvm_string, sizeof(llvm_string),
-                        ", LLVM %i.%i.%i", (HAVE_LLVM >> 8) & 0xff,
-                        HAVE_LLVM & 0xff, MESA_LLVM_VERSION_PATCH);
+#if HAVE_LLVM
+       snprintf(llvm_string, sizeof(llvm_string),
+                ", LLVM %i.%i.%i", (HAVE_LLVM >> 8) & 0xff,
+                HAVE_LLVM & 0xff, MESA_LLVM_VERSION_PATCH);
+#endif
 
        snprintf(rscreen->renderer_string, sizeof(rscreen->renderer_string),
                 "%s (DRM %i.%i.%i%s)",
@@ -926,7 +946,9 @@ bool r600_common_screen_init(struct r600_common_screen *rscreen,
        pipe_mutex_init(rscreen->aux_context_lock);
        pipe_mutex_init(rscreen->gpu_load_mutex);
 
-       if (rscreen->info.drm_minor >= 28 && (rscreen->debug_flags & DBG_TRACE_CS)) {
+       if (((rscreen->info.drm_major == 2 && rscreen->info.drm_minor >= 28) ||
+            rscreen->info.drm_major == 3) &&
+           (rscreen->debug_flags & DBG_TRACE_CS)) {
                rscreen->trace_bo = (struct r600_resource*)pipe_buffer_create(&rscreen->b,
                                                                                PIPE_BIND_CUSTOM,
                                                                                PIPE_USAGE_STAGING,