#include "r600_pipe_common.h"
#include "r600_cs.h"
#include "tgsi/tgsi_parse.h"
+#include "util/u_draw_quad.h"
#include "util/u_memory.h"
#include "util/u_format_s3tc.h"
#include "util/u_upload_mgr.h"
#include "radeon/radeon_video.h"
#include <inttypes.h>
+#ifndef HAVE_LLVM
+#define HAVE_LLVM 0
+#endif
+
/*
* pipe_context
*/
+void r600_draw_rectangle(struct blitter_context *blitter,
+ int x1, int y1, int x2, int y2, float depth,
+ enum blitter_attrib_type type,
+ const union pipe_color_union *attrib)
+{
+ struct r600_common_context *rctx =
+ (struct r600_common_context*)util_blitter_get_pipe(blitter);
+ struct pipe_viewport_state viewport;
+ struct pipe_resource *buf = NULL;
+ unsigned offset = 0;
+ float *vb;
+
+ if (type == UTIL_BLITTER_ATTRIB_TEXCOORD) {
+ util_blitter_draw_rectangle(blitter, x1, y1, x2, y2, depth, type, attrib);
+ return;
+ }
+
+ /* Some operations (like color resolve on r6xx) don't work
+ * with the conventional primitive types.
+ * One that works is PT_RECTLIST, which we use here. */
+
+ /* setup viewport */
+ viewport.scale[0] = 1.0f;
+ viewport.scale[1] = 1.0f;
+ viewport.scale[2] = 1.0f;
+ viewport.translate[0] = 0.0f;
+ viewport.translate[1] = 0.0f;
+ viewport.translate[2] = 0.0f;
+ rctx->b.set_viewport_states(&rctx->b, 0, 1, &viewport);
+
+ /* Upload vertices. The hw rectangle has only 3 vertices,
+ * I guess the 4th one is derived from the first 3.
+ * The vertex specification should match u_blitter's vertex element state. */
+ u_upload_alloc(rctx->uploader, 0, sizeof(float) * 24, &offset, &buf, (void**)&vb);
+ vb[0] = x1;
+ vb[1] = y1;
+ vb[2] = depth;
+ vb[3] = 1;
+
+ vb[8] = x1;
+ vb[9] = y2;
+ vb[10] = depth;
+ vb[11] = 1;
+
+ vb[16] = x2;
+ vb[17] = y1;
+ vb[18] = depth;
+ vb[19] = 1;
+
+ if (attrib) {
+ memcpy(vb+4, attrib->f, sizeof(float)*4);
+ memcpy(vb+12, attrib->f, sizeof(float)*4);
+ memcpy(vb+20, attrib->f, sizeof(float)*4);
+ }
+
+ /* draw */
+ util_draw_vertex_buffer(&rctx->b, NULL, buf, blitter->vb_slot, offset,
+ R600_PRIM_RECTANGLE_LIST, 3, 2);
+ pipe_resource_reference(&buf, NULL);
+}
+
void r600_need_dma_space(struct r600_common_context *ctx, unsigned num_dw)
{
- /* The number of dwords we already used in the DMA so far. */
- num_dw += ctx->rings.dma.cs->cdw;
/* Flush if there's not enough space. */
- if (num_dw > RADEON_MAX_CMDBUF_DWORDS) {
+ if ((num_dw + ctx->rings.dma.cs->cdw) > RADEON_MAX_CMDBUF_DWORDS) {
ctx->rings.dma.flush(ctx, RADEON_FLUSH_ASYNC, NULL);
+ assert((num_dw + ctx->rings.dma.cs->cdw) <= RADEON_MAX_CMDBUF_DWORDS);
}
}
rctx->ws = rscreen->ws;
rctx->family = rscreen->family;
rctx->chip_class = rscreen->chip_class;
- rctx->max_db = rscreen->chip_class >= EVERGREEN ? 8 : 4;
+
+ if (rscreen->family == CHIP_HAWAII)
+ rctx->max_db = 16;
+ else if (rscreen->chip_class >= EVERGREEN)
+ rctx->max_db = 8;
+ else
+ rctx->max_db = 4;
rctx->b.transfer_map = u_transfer_map_vtbl;
rctx->b.transfer_flush_region = u_default_transfer_flush_region;
rctx->b.memory_barrier = r600_memory_barrier;
rctx->b.flush = r600_flush_from_st;
+ LIST_INITHEAD(&rctx->texture_buffers);
+
r600_init_context_texture_functions(rctx);
r600_streamout_init(rctx);
r600_query_init(rctx);
{ "compute", DBG_COMPUTE, "Print compute info" },
{ "vm", DBG_VM, "Print virtual addresses when creating resources" },
{ "trace_cs", DBG_TRACE_CS, "Trace cs and write rlockup_<csid>.c file with faulty cs" },
-
- /* features */
- { "nodma", DBG_NO_ASYNC_DMA, "Disable asynchronous DMA" },
+ { "info", DBG_INFO, "Print driver information" },
/* shaders */
{ "fs", DBG_FS, "Print fetch shaders" },
{ "ps", DBG_PS, "Print pixel shaders" },
{ "cs", DBG_CS, "Print compute shaders" },
- { "hyperz", DBG_HYPERZ, "Enable Hyper-Z" },
+ /* features */
+ { "nodma", DBG_NO_ASYNC_DMA, "Disable asynchronous DMA" },
+ { "nohyperz", DBG_NO_HYPERZ, "Disable Hyper-Z" },
/* GL uses the word INVALIDATE, gallium uses the word DISCARD */
{ "noinvalrange", DBG_NO_DISCARD_RANGE, "Disable handling of INVALIDATE_RANGE map flags" },
+ { "no2d", DBG_NO_2D_TILING, "Disable 2D tiling" },
+ { "notiling", DBG_NO_TILING, "Disable tiling" },
+ { "switch_on_eop", DBG_SWITCH_ON_EOP, "Program WD/IA to switch on end-of-packet." },
+ { "forcedma", DBG_FORCE_DMA, "Use asynchronous DMA for all operations when possible." },
+ { "precompile", DBG_PRECOMPILE, "Compile one shader variant at shader creation." },
DEBUG_NAMED_VALUE_END /* must be last */
};
return "X.Org";
}
+static const char* r600_get_device_vendor(struct pipe_screen* pscreen)
+{
+ return "AMD";
+}
+
static const char* r600_get_name(struct pipe_screen* pscreen)
{
struct r600_common_screen *rscreen = (struct r600_common_screen*)pscreen;
case CHIP_PITCAIRN: return "pitcairn";
case CHIP_VERDE: return "verde";
case CHIP_OLAND: return "oland";
-#if HAVE_LLVM <= 0x0303
- default:
- fprintf(stderr, "%s: Unknown chipset = %i, defaulting to Southern Islands\n",
- __func__, family);
- return "SI";
-#else
case CHIP_HAINAN: return "hainan";
case CHIP_BONAIRE: return "bonaire";
case CHIP_KABINI: return "kabini";
return "kabini";
#endif
default: return "";
-#endif
}
}
//TODO: select these params by asic
switch (param) {
case PIPE_COMPUTE_CAP_IR_TARGET: {
- const char *gpu = r600_get_llvm_processor_name(rscreen->family);
+ const char *gpu;
+ const char *triple;
+ if (rscreen->family <= CHIP_ARUBA || HAVE_LLVM < 0x0306) {
+ triple = "r600--";
+ } else {
+ triple = "amdgcn--";
+ }
+ switch(rscreen->family) {
+ /* Clang < 3.6 is missing Hainan in its list of
+ * GPUs, so we need to use the name of a similar GPU.
+ */
+#if HAVE_LLVM < 0x0306
+ case CHIP_HAINAN:
+ gpu = "oland";
+ break;
+#endif
+ default:
+ gpu = r600_get_llvm_processor_name(rscreen->family);
+ break;
+ }
if (ret) {
- sprintf(ret, "%s-r600--", gpu);
+ sprintf(ret, "%s-%s", gpu, triple);
}
- return (8 + strlen(gpu)) * sizeof(char);
+ /* +2 for dash and terminating NIL byte */
+ return (strlen(triple) + strlen(gpu) + 2) * sizeof(char);
}
case PIPE_COMPUTE_CAP_GRID_DIMENSION:
if (ret) {
case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE:
if (ret) {
uint64_t *max_global_size = ret;
- /* XXX: This is what the proprietary driver reports, we
- * may want to use a different value. */
- /* XXX: Not sure what to put here for SI. */
- if (rscreen->chip_class >= SI)
- *max_global_size = 2000000000;
- else
- *max_global_size = 201326592;
+ uint64_t max_mem_alloc_size;
+
+ r600_get_compute_param(screen,
+ PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE,
+ &max_mem_alloc_size);
+
+ /* In OpenCL, the MAX_MEM_ALLOC_SIZE must be at least
+ * 1/4 of the MAX_GLOBAL_SIZE. Since the
+ * MAX_MEM_ALLOC_SIZE is fixed for older kernels,
+ * make sure we never report more than
+ * 4 * MAX_MEM_ALLOC_SIZE.
+ */
+ *max_global_size = MIN2(4 * max_mem_alloc_size,
+ rscreen->info.gart_size +
+ rscreen->info.vram_size);
}
return sizeof(uint64_t);
case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE:
if (ret) {
- uint64_t max_global_size;
uint64_t *max_mem_alloc_size = ret;
- r600_get_compute_param(screen, PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE, &max_global_size);
- /* OpenCL requres this value be at least
- * max(MAX_GLOBAL_SIZE / 4, 128 * 1024 *1024)
- * I'm really not sure what value to report here, but
- * MAX_GLOBAL_SIZE / 4 seems resonable.
+
+ /* XXX: The limit in older kernels is 256 MB. We
+ * should add a query here for newer kernels.
*/
- *max_mem_alloc_size = max_global_size / 4;
+ *max_mem_alloc_size = 256 * 1024 * 1024;
}
return sizeof(uint64_t);
case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS:
if (ret) {
uint32_t *max_compute_units = ret;
- *max_compute_units = MAX2(rscreen->info.max_compute_units, 1);
+ *max_compute_units = rscreen->info.max_compute_units;
}
return sizeof(uint32_t);
- default:
- fprintf(stderr, "unknown PIPE_COMPUTE_CAP %d\n", param);
- return 0;
+ case PIPE_COMPUTE_CAP_IMAGES_SUPPORTED:
+ if (ret) {
+ uint32_t *images_supported = ret;
+ *images_supported = 0;
+ }
+ return sizeof(uint32_t);
+ case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE:
+ break; /* unused */
}
+
+ fprintf(stderr, "unknown PIPE_COMPUTE_CAP %d\n", param);
+ return 0;
}
static uint64_t r600_get_timestamp(struct pipe_screen *screen)
{
struct r600_common_screen *rscreen = (struct r600_common_screen*)screen;
struct pipe_driver_query_info list[] = {
- {"draw-calls", R600_QUERY_DRAW_CALLS, 0},
- {"requested-VRAM", R600_QUERY_REQUESTED_VRAM, rscreen->info.vram_size, TRUE},
- {"requested-GTT", R600_QUERY_REQUESTED_GTT, rscreen->info.gart_size, TRUE},
- {"buffer-wait-time", R600_QUERY_BUFFER_WAIT_TIME, 0, FALSE},
- {"num-cs-flushes", R600_QUERY_NUM_CS_FLUSHES, 0, FALSE},
- {"num-bytes-moved", R600_QUERY_NUM_BYTES_MOVED, 0, TRUE},
- {"VRAM-usage", R600_QUERY_VRAM_USAGE, rscreen->info.vram_size, TRUE},
- {"GTT-usage", R600_QUERY_GTT_USAGE, rscreen->info.gart_size, TRUE},
+ {"draw-calls", R600_QUERY_DRAW_CALLS, {0}},
+ {"requested-VRAM", R600_QUERY_REQUESTED_VRAM, {rscreen->info.vram_size}, PIPE_DRIVER_QUERY_TYPE_BYTES},
+ {"requested-GTT", R600_QUERY_REQUESTED_GTT, {rscreen->info.gart_size}, PIPE_DRIVER_QUERY_TYPE_BYTES},
+ {"buffer-wait-time", R600_QUERY_BUFFER_WAIT_TIME, {0}},
+ {"num-cs-flushes", R600_QUERY_NUM_CS_FLUSHES, {0}},
+ {"num-bytes-moved", R600_QUERY_NUM_BYTES_MOVED, {0}, PIPE_DRIVER_QUERY_TYPE_BYTES},
+ {"VRAM-usage", R600_QUERY_VRAM_USAGE, {rscreen->info.vram_size}, PIPE_DRIVER_QUERY_TYPE_BYTES},
+ {"GTT-usage", R600_QUERY_GTT_USAGE, {rscreen->info.gart_size}, PIPE_DRIVER_QUERY_TYPE_BYTES},
+ {"temperature", R600_QUERY_GPU_TEMPERATURE, {100}},
+ {"shader-clock", R600_QUERY_CURRENT_GPU_SCLK, {0}},
+ {"memory-clock", R600_QUERY_CURRENT_GPU_MCLK, {0}},
+ {"GPU-load", R600_QUERY_GPU_LOAD, {100}}
};
+ unsigned num_queries;
+
+ if (rscreen->info.drm_major == 2 && rscreen->info.drm_minor >= 42)
+ num_queries = Elements(list);
+ else
+ num_queries = 8;
if (!info)
- return Elements(list);
+ return num_queries;
- if (index >= Elements(list))
+ if (index >= num_queries)
return 0;
*info = list[index];
rscreen->b.get_name = r600_get_name;
rscreen->b.get_vendor = r600_get_vendor;
+ rscreen->b.get_device_vendor = r600_get_device_vendor;
rscreen->b.get_compute_param = r600_get_compute_param;
rscreen->b.get_paramf = r600_get_paramf;
rscreen->b.get_driver_query_info = r600_get_driver_query_info;
rscreen->b.fence_reference = r600_fence_reference;
rscreen->b.fence_signalled = r600_fence_signalled;
rscreen->b.resource_destroy = u_resource_destroy_vtbl;
+ rscreen->b.resource_from_user_memory = r600_buffer_from_user_memory;
if (rscreen->info.has_uvd) {
rscreen->b.get_video_param = rvid_get_video_param;
}
util_format_s3tc_init();
pipe_mutex_init(rscreen->aux_context_lock);
+ pipe_mutex_init(rscreen->gpu_load_mutex);
if (rscreen->info.drm_minor >= 28 && (rscreen->debug_flags & DBG_TRACE_CS)) {
rscreen->trace_bo = (struct r600_resource*)pipe_buffer_create(&rscreen->b,
}
}
+ if (rscreen->debug_flags & DBG_INFO) {
+ printf("pci_id = 0x%x\n", rscreen->info.pci_id);
+ printf("family = %i\n", rscreen->info.family);
+ printf("chip_class = %i\n", rscreen->info.chip_class);
+ printf("gart_size = %i MB\n", (int)(rscreen->info.gart_size >> 20));
+ printf("vram_size = %i MB\n", (int)(rscreen->info.vram_size >> 20));
+ printf("max_sclk = %i\n", rscreen->info.max_sclk);
+ printf("max_compute_units = %i\n", rscreen->info.max_compute_units);
+ printf("max_se = %i\n", rscreen->info.max_se);
+ printf("max_sh_per_se = %i\n", rscreen->info.max_sh_per_se);
+ printf("drm = %i.%i.%i\n", rscreen->info.drm_major,
+ rscreen->info.drm_minor, rscreen->info.drm_patchlevel);
+ printf("has_uvd = %i\n", rscreen->info.has_uvd);
+ printf("vce_fw_version = %i\n", rscreen->info.vce_fw_version);
+ printf("r600_num_backends = %i\n", rscreen->info.r600_num_backends);
+ printf("r600_clock_crystal_freq = %i\n", rscreen->info.r600_clock_crystal_freq);
+ printf("r600_tiling_config = 0x%x\n", rscreen->info.r600_tiling_config);
+ printf("r600_num_tile_pipes = %i\n", rscreen->info.r600_num_tile_pipes);
+ printf("r600_max_pipes = %i\n", rscreen->info.r600_max_pipes);
+ printf("r600_virtual_address = %i\n", rscreen->info.r600_virtual_address);
+ printf("r600_has_dma = %i\n", rscreen->info.r600_has_dma);
+ printf("r600_backend_map = %i\n", rscreen->info.r600_backend_map);
+ printf("r600_backend_map_valid = %i\n", rscreen->info.r600_backend_map_valid);
+ printf("si_tile_mode_array_valid = %i\n", rscreen->info.si_tile_mode_array_valid);
+ printf("cik_macrotile_mode_array_valid = %i\n", rscreen->info.cik_macrotile_mode_array_valid);
+ }
return true;
}
void r600_destroy_common_screen(struct r600_common_screen *rscreen)
{
+ r600_gpu_load_kill_thread(rscreen);
+
+ pipe_mutex_destroy(rscreen->gpu_load_mutex);
pipe_mutex_destroy(rscreen->aux_context_lock);
rscreen->aux_context->destroy(rscreen->aux_context);
FREE(rscreen);
}
-static unsigned tgsi_get_processor_type(const struct tgsi_token *tokens)
-{
- struct tgsi_parse_context parse;
-
- if (tgsi_parse_init( &parse, tokens ) != TGSI_PARSE_OK) {
- debug_printf("tgsi_parse_init() failed in %s:%i!\n", __func__, __LINE__);
- return ~0;
- }
- return parse.FullHeader.Processor.Processor;
-}
-
bool r600_can_dump_shader(struct r600_common_screen *rscreen,
const struct tgsi_token *tokens)
{
}
void r600_screen_clear_buffer(struct r600_common_screen *rscreen, struct pipe_resource *dst,
- unsigned offset, unsigned size, unsigned value)
+ unsigned offset, unsigned size, unsigned value,
+ bool is_framebuffer)
{
struct r600_common_context *rctx = (struct r600_common_context*)rscreen->aux_context;
pipe_mutex_lock(rscreen->aux_context_lock);
- rctx->clear_buffer(&rctx->b, dst, offset, size, value);
+ rctx->clear_buffer(&rctx->b, dst, offset, size, value, is_framebuffer);
rscreen->aux_context->flush(rscreen->aux_context, NULL, 0);
pipe_mutex_unlock(rscreen->aux_context_lock);
}
projects / mesa.git / blobdiff