gallium/u_blitter: add new union blitter_attrib to replace pipe_color_union

[mesa.git] / src / gallium / drivers / radeon / r600_pipe_common.h

diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index 952fb77a4532b6439bd6b51f1efd9cce883fc9d7..48536723b6cb4a1d31da6950de6983ea076a25e8 100644 (file)
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -47,6 +47,8 @@
 #include "util/u_transfer.h"
 #include "util/u_threaded_context.h"
 
+struct u_log_context;
+
 #define ATI_VENDOR_ID 0x1002
 
 #define R600_RESOURCE_FLAG_TRANSFER            (PIPE_RESOURCE_FLAG_DRV_PRIV << 0)
@@ -59,26 +61,28 @@
 /* Pipeline & streamout query controls. */
 #define R600_CONTEXT_START_PIPELINE_STATS      (1u << 1)
 #define R600_CONTEXT_STOP_PIPELINE_STATS       (1u << 2)
-#define R600_CONTEXT_PRIVATE_FLAG              (1u << 3)
+#define R600_CONTEXT_FLUSH_FOR_RENDER_COND     (1u << 3)
+#define R600_CONTEXT_PRIVATE_FLAG              (1u << 4)
 
 /* special primitive types */
 #define R600_PRIM_RECTANGLE_LIST       PIPE_PRIM_MAX
 
+#define R600_NOT_QUERY         0xffffffff
+
 /* Debug flags. */
-/* logging and features */
-#define DBG_TEX                        (1 << 0)
-#define DBG_NIR                        (1 << 1)
-#define DBG_COMPUTE            (1 << 2)
-#define DBG_VM                 (1 << 3)
-#define DBG_CE                 (1 << 4)
-/* shader logging */
-#define DBG_FS                 (1 << 5)
-#define DBG_VS                 (1 << 6)
-#define DBG_GS                 (1 << 7)
-#define DBG_PS                 (1 << 8)
-#define DBG_CS                 (1 << 9)
-#define DBG_TCS                        (1 << 10)
-#define DBG_TES                        (1 << 11)
+#define DBG_VS                 (1 << PIPE_SHADER_VERTEX)
+#define DBG_PS                 (1 << PIPE_SHADER_FRAGMENT)
+#define DBG_GS                 (1 << PIPE_SHADER_GEOMETRY)
+#define DBG_TCS                        (1 << PIPE_SHADER_TESS_CTRL)
+#define DBG_TES                        (1 << PIPE_SHADER_TESS_EVAL)
+#define DBG_CS                 (1 << PIPE_SHADER_COMPUTE)
+#define DBG_ALL_SHADERS                (DBG_FS - 1)
+#define DBG_FS                 (1 << 6) /* fetch shader */
+#define DBG_TEX                        (1 << 7)
+#define DBG_NIR                        (1 << 8)
+#define DBG_COMPUTE            (1 << 9)
+/* gap */
+#define DBG_VM                 (1 << 11)
 #define DBG_NO_IR              (1 << 12)
 #define DBG_NO_TGSI            (1 << 13)
 #define DBG_NO_ASM             (1 << 14)
@@ -106,12 +110,14 @@
 #define DBG_NO_RB_PLUS         (1ull << 45)
 #define DBG_SI_SCHED           (1ull << 46)
 #define DBG_MONOLITHIC_SHADERS (1ull << 47)
-#define DBG_NO_CE              (1ull << 48)
+/* gap */
 #define DBG_UNSAFE_MATH                (1ull << 49)
 #define DBG_NO_DCC_FB          (1ull << 50)
 #define DBG_TEST_VMFAULT_CP    (1ull << 51)
 #define DBG_TEST_VMFAULT_SDMA  (1ull << 52)
 #define DBG_TEST_VMFAULT_SHADER        (1ull << 53)
+#define DBG_NO_DPBB            (1ull << 54)
+#define DBG_NO_DFSM            (1ull << 55)
 
 #define R600_MAP_BUFFER_ALIGNMENT 64
 #define R600_MAX_VIEWPORTS        16
@@ -373,7 +379,6 @@ union r600_mmio_counters {
                struct r600_mmio_counter surf_sync;
                struct r600_mmio_counter cp_dma;
                struct r600_mmio_counter scratch_ram;
-               struct r600_mmio_counter ce;
        } named;
        unsigned array[0];
 };
@@ -451,6 +456,11 @@ struct r600_common_screen {
                 */
                unsigned cp_to_L2;
 
+               /* Context flags to set so that all writes from earlier jobs
+                * that end in L2 are seen by CP.
+                */
+               unsigned L2_to_cp;
+
                /* Context flags to set so that all writes from earlier
                 * compute jobs are seen by L2 clients.
                 */
@@ -566,6 +576,7 @@ struct r600_common_context {
        unsigned                        gpu_reset_counter;
        unsigned                        last_dirty_tex_counter;
        unsigned                        last_compressed_colortex_counter;
+       unsigned                        last_num_draw_calls;
 
        struct threaded_context         *tc;
        struct u_suballocator           *allocator_zeroed_memory;
@@ -652,6 +663,7 @@ struct r600_common_context {
 
        struct pipe_debug_callback      debug;
        struct pipe_device_reset_callback device_reset_callback;
+       struct u_log_context            *log;
 
        void                            *query_result_shader;
 
@@ -748,15 +760,14 @@ void r600_gfx_write_event_eop(struct r600_common_context *ctx,
                              unsigned event, unsigned event_flags,
                              unsigned data_sel,
                              struct r600_resource *buf, uint64_t va,
-                             uint32_t old_fence, uint32_t new_fence,
-                             unsigned query_type);
+                             uint32_t new_fence, unsigned query_type);
 unsigned r600_gfx_write_fence_dwords(struct r600_common_screen *screen);
 void r600_gfx_wait_fence(struct r600_common_context *ctx,
                         uint64_t va, uint32_t ref, uint32_t mask);
 void r600_draw_rectangle(struct blitter_context *blitter,
                         int x1, int y1, int x2, int y2, float depth,
                         enum blitter_attrib_type type,
-                        const union pipe_color_union *attrib);
+                        const union blitter_attrib *attrib);
 bool r600_common_screen_init(struct r600_common_screen *rscreen,
                             struct radeon_winsys *ws);
 void r600_destroy_common_screen(struct r600_common_screen *rscreen);
@@ -831,7 +842,7 @@ bool r600_init_flushed_depth_texture(struct pipe_context *ctx,
                                     struct pipe_resource *texture,
                                     struct r600_texture **staging);
 void r600_print_texture_info(struct r600_common_screen *rscreen,
-                            struct r600_texture *rtex, FILE *f);
+                            struct r600_texture *rtex, struct u_log_context *log);
 struct pipe_resource *r600_texture_create(struct pipe_screen *screen,
                                        const struct pipe_resource *templ);
 bool vi_dcc_formats_compatible(enum pipe_format format1,
@@ -1003,6 +1014,19 @@ vi_dcc_enabled(struct r600_texture *tex, unsigned level)
        return tex->dcc_offset && level < tex->surface.num_dcc_levels;
 }
 
+static inline bool
+r600_htile_enabled(struct r600_texture *tex, unsigned level)
+{
+       return tex->htile_offset && level == 0;
+}
+
+static inline bool
+vi_tc_compat_htile_enabled(struct r600_texture *tex, unsigned level)
+{
+       assert(!tex->tc_compatible_htile || tex->htile_offset);
+       return tex->tc_compatible_htile && level == 0;
+}
+
 #define COMPUTE_DBG(rscreen, fmt, args...) \
        do { \
                if ((rscreen->b.debug_flags & DBG_COMPUTE)) fprintf(stderr, fmt, ##args); \