radeonsi: expose MRT-draw-calls to HUD

[mesa.git] / src / gallium / drivers / radeon / r600_pipe_common.h

diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index b22a3a75cb3ac5f2b2e1a68a2d9de83689568949..4e3b42a112fef37865c638dc55702b958b2896f2 100644 (file)
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -90,28 +90,28 @@
 #define DBG_TEST_DMA           (1 << 20)
 /* Bits 21-31 are reserved for the r600g driver. */
 /* features */
-#define DBG_NO_ASYNC_DMA       (1llu << 32)
-#define DBG_NO_HYPERZ          (1llu << 33)
-#define DBG_NO_DISCARD_RANGE   (1llu << 34)
-#define DBG_NO_2D_TILING       (1llu << 35)
-#define DBG_NO_TILING          (1llu << 36)
-#define DBG_SWITCH_ON_EOP      (1llu << 37)
-#define DBG_FORCE_DMA          (1llu << 38)
-#define DBG_PRECOMPILE         (1llu << 39)
-#define DBG_INFO               (1llu << 40)
-#define DBG_NO_WC              (1llu << 41)
-#define DBG_CHECK_VM           (1llu << 42)
-#define DBG_NO_DCC             (1llu << 43)
-#define DBG_NO_DCC_CLEAR       (1llu << 44)
-#define DBG_NO_RB_PLUS         (1llu << 45)
-#define DBG_SI_SCHED           (1llu << 46)
-#define DBG_MONOLITHIC_SHADERS (1llu << 47)
-#define DBG_NO_CE              (1llu << 48)
-#define DBG_UNSAFE_MATH                (1llu << 49)
-#define DBG_NO_DCC_FB          (1llu << 50)
-#define DBG_TEST_VMFAULT_CP    (1llu << 51)
-#define DBG_TEST_VMFAULT_SDMA  (1llu << 52)
-#define DBG_TEST_VMFAULT_SHADER        (1llu << 53)
+#define DBG_NO_ASYNC_DMA       (1ull << 32)
+#define DBG_NO_HYPERZ          (1ull << 33)
+#define DBG_NO_DISCARD_RANGE   (1ull << 34)
+#define DBG_NO_2D_TILING       (1ull << 35)
+#define DBG_NO_TILING          (1ull << 36)
+#define DBG_SWITCH_ON_EOP      (1ull << 37)
+#define DBG_FORCE_DMA          (1ull << 38)
+#define DBG_PRECOMPILE         (1ull << 39)
+#define DBG_INFO               (1ull << 40)
+#define DBG_NO_WC              (1ull << 41)
+#define DBG_CHECK_VM           (1ull << 42)
+#define DBG_NO_DCC             (1ull << 43)
+#define DBG_NO_DCC_CLEAR       (1ull << 44)
+#define DBG_NO_RB_PLUS         (1ull << 45)
+#define DBG_SI_SCHED           (1ull << 46)
+#define DBG_MONOLITHIC_SHADERS (1ull << 47)
+#define DBG_NO_CE              (1ull << 48)
+#define DBG_UNSAFE_MATH                (1ull << 49)
+#define DBG_NO_DCC_FB          (1ull << 50)
+#define DBG_TEST_VMFAULT_CP    (1ull << 51)
+#define DBG_TEST_VMFAULT_SDMA  (1ull << 52)
+#define DBG_TEST_VMFAULT_SHADER        (1ull << 53)
 
 #define R600_MAP_BUFFER_ALIGNMENT 64
 #define R600_MAX_VIEWPORTS        16
@@ -587,6 +587,7 @@ struct r600_common_context {
        unsigned                        num_cs_dw_queries_suspend;
        /* Misc stats. */
        unsigned                        num_draw_calls;
+       unsigned                        num_mrt_draw_calls;
        unsigned                        num_prim_restart_calls;
        unsigned                        num_spill_draw_calls;
        unsigned                        num_compute_calls;
@@ -1006,4 +1007,9 @@ vi_dcc_enabled(struct r600_texture *tex, unsigned level)
        (((unsigned)(s2x) & 0xf) << 16) | (((unsigned)(s2y) & 0xf) << 20) |        \
         (((unsigned)(s3x) & 0xf) << 24) | (((unsigned)(s3y) & 0xf) << 28))
 
+static inline int S_FIXED(float value, unsigned frac_bits)
+{
+       return value * (1 << frac_bits);
+}
+
 #endif