ilo: fold drm_intel_get_aperture_sizes() within probe_winsys()

[mesa.git] / src / gallium / drivers / radeon / r600_pipe_common.h

diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index 36a4fb1f6aaa08a7617da092230ebd2431ac8ebf..ab348ae02ccc83f1a51720668ae7055bac9515cf 100644 (file)
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -72,6 +72,7 @@
 #define R600_CONTEXT_WAIT_3D_IDLE              (1 << 17)
 #define R600_CONTEXT_WAIT_CP_DMA_IDLE          (1 << 18)
 #define R600_CONTEXT_VGT_FLUSH                 (1 << 19)
+#define R600_CONTEXT_VGT_STREAMOUT_SYNC                (1 << 20)
 
 /* Debug flags. */
 /* logging */
@@ -80,17 +81,19 @@
 #define DBG_COMPUTE            (1 << 2)
 #define DBG_VM                 (1 << 3)
 #define DBG_TRACE_CS           (1 << 4)
+/* shader logging */
+#define DBG_FS                 (1 << 5)
+#define DBG_VS                 (1 << 6)
+#define DBG_GS                 (1 << 7)
+#define DBG_PS                 (1 << 8)
+#define DBG_CS                 (1 << 9)
 /* features */
-#define DBG_NO_ASYNC_DMA       (1 << 5)
-/* shaders */
-#define DBG_FS                 (1 << 8)
-#define DBG_VS                 (1 << 9)
-#define DBG_GS                 (1 << 10)
-#define DBG_PS                 (1 << 11)
-#define DBG_CS                 (1 << 12)
-/* features */
-#define DBG_HYPERZ             (1 << 13)
-#define DBG_NO_DISCARD_RANGE   (1 << 14)
+#define DBG_NO_ASYNC_DMA       (1 << 10)
+#define DBG_HYPERZ             (1 << 11)
+#define DBG_NO_DISCARD_RANGE   (1 << 12)
+#define DBG_NO_2D_TILING       (1 << 13)
+#define DBG_NO_TILING          (1 << 14)
+#define DBG_SWITCH_ON_EOP      (1 << 15)
 /* The maximum allowed bit is 15. */
 
 #define R600_MAP_BUFFER_ALIGNMENT 64
@@ -108,6 +111,11 @@ struct radeon_shader_binary {
        unsigned char *config;
        unsigned config_size;
 
+       /** Constant data accessed by the shader.  This will be uploaded
+        * into a constant buffer. */
+       unsigned char *rodata;
+       unsigned rodata_size;
+
        /** Set to 1 if the disassembly for this binary has been dumped to
         *  stderr. */
        int disassembled;
@@ -119,6 +127,7 @@ struct r600_resource {
        /* Winsys objects. */
        struct pb_buffer                *buf;
        struct radeon_winsys_cs_handle  *cs_buf;
+       uint64_t                        gpu_address;
 
        /* Resource state. */
        enum radeon_bo_domain           domains;
@@ -352,6 +361,24 @@ struct r600_common_context {
        unsigned                        current_render_cond_mode;
        boolean                         current_render_cond_cond;
        boolean                         predicate_drawing;
+       /* For context flushing. */
+       struct pipe_query               *saved_render_cond;
+       boolean                         saved_render_cond_cond;
+       unsigned                        saved_render_cond_mode;
+
+       /* MSAA sample locations.
+        * The first index is the sample index.
+        * The second index is the coordinate: X, Y. */
+       float                           sample_locations_1x[1][2];
+       float                           sample_locations_2x[2][2];
+       float                           sample_locations_4x[4][2];
+       float                           sample_locations_8x[8][2];
+       float                           sample_locations_16x[16][2];
+
+       /* The list of all texture buffer objects in this context.
+        * This list is walked when a buffer is invalidated/reallocated and
+        * the GPU addresses are updated. */
+       struct list_head                texture_buffers;
 
        /* Copy one resource to another using async DMA. */
        void (*dma_copy)(struct pipe_context *ctx,
@@ -403,6 +430,8 @@ struct pipe_resource *r600_buffer_create(struct pipe_screen *screen,
 bool r600_common_screen_init(struct r600_common_screen *rscreen,
                             struct radeon_winsys *ws);
 void r600_destroy_common_screen(struct r600_common_screen *rscreen);
+void r600_preflush_suspend_features(struct r600_common_context *ctx);
+void r600_postflush_resume_features(struct r600_common_context *ctx);
 bool r600_common_context_init(struct r600_common_context *rctx,
                              struct r600_common_screen *rscreen);
 void r600_common_context_cleanup(struct r600_common_context *rctx);
@@ -466,7 +495,10 @@ extern const uint32_t eg_sample_locs_4x[4];
 extern const unsigned eg_max_dist_4x;
 void cayman_get_sample_position(struct pipe_context *ctx, unsigned sample_count,
                                unsigned sample_index, float *out_value);
-void cayman_emit_msaa_state(struct radeon_winsys_cs *cs, int nr_samples);
+void cayman_init_msaa(struct pipe_context *ctx);
+void cayman_emit_msaa_sample_locs(struct radeon_winsys_cs *cs, int nr_samples);
+void cayman_emit_msaa_config(struct radeon_winsys_cs *cs, int nr_samples,
+                            int ps_iter_samples);
 
 
 /* Inline helpers. */
@@ -483,6 +515,20 @@ r600_resource_reference(struct r600_resource **ptr, struct r600_resource *res)
                                (struct pipe_resource *)res);
 }
 
+static inline unsigned r600_tex_aniso_filter(unsigned filter)
+{
+       if (filter <= 1)   return 0;
+       if (filter <= 2)   return 1;
+       if (filter <= 4)   return 2;
+       if (filter <= 8)   return 3;
+        /* else */        return 4;
+}
+
+#define COMPUTE_DBG(rscreen, fmt, args...) \
+       do { \
+               if ((rscreen->b.debug_flags & DBG_COMPUTE)) fprintf(stderr, fmt, ##args); \
+       } while (0);
+
 #define R600_ERR(fmt, args...) \
        fprintf(stderr, "EE %s:%d %s - "fmt, __FILE__, __LINE__, __func__, ##args)