* USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
+#include "radeonsi/si_pipe.h"
#include "r600_query.h"
#include "r600_cs.h"
#include "util/u_memory.h"
#include "util/u_upload_mgr.h"
-#include "os/os_time.h"
+#include "util/os_time.h"
#include "tgsi/tgsi_text.h"
+#include "amd/common/sid.h"
#define R600_MAX_STREAMS 4
struct pipe_fence_handle *fence;
};
-static void r600_query_sw_destroy(struct r600_common_screen *rscreen,
+static void r600_query_sw_destroy(struct si_screen *sscreen,
struct r600_query *rquery)
{
struct r600_query_sw *query = (struct r600_query_sw *)rquery;
- rscreen->b.fence_reference(&rscreen->b, &query->fence, NULL);
+ sscreen->b.fence_reference(&sscreen->b, &query->fence, NULL);
FREE(query);
}
case R600_QUERY_NUM_GFX_IBS: return RADEON_NUM_GFX_IBS;
case R600_QUERY_NUM_SDMA_IBS: return RADEON_NUM_SDMA_IBS;
case R600_QUERY_GFX_BO_LIST_SIZE: return RADEON_GFX_BO_LIST_COUNTER;
+ case R600_QUERY_GFX_IB_SIZE: return RADEON_GFX_IB_SIZE_COUNTER;
case R600_QUERY_NUM_BYTES_MOVED: return RADEON_NUM_BYTES_MOVED;
case R600_QUERY_NUM_EVICTIONS: return RADEON_NUM_EVICTIONS;
case R600_QUERY_NUM_VRAM_CPU_PAGE_FAULTS: return RADEON_NUM_VRAM_CPU_PAGE_FAULTS;
query->begin_result = 0;
break;
case R600_QUERY_BUFFER_WAIT_TIME:
+ case R600_QUERY_GFX_IB_SIZE:
case R600_QUERY_NUM_GFX_IBS:
case R600_QUERY_NUM_SDMA_IBS:
case R600_QUERY_NUM_BYTES_MOVED:
case R600_QUERY_GPU_SURF_SYNC_BUSY:
case R600_QUERY_GPU_CP_DMA_BUSY:
case R600_QUERY_GPU_SCRATCH_RAM_BUSY:
- query->begin_result = r600_begin_counter(rctx->screen,
+ query->begin_result = si_begin_counter(rctx->screen,
query->b.type);
break;
case R600_QUERY_NUM_COMPILATIONS:
case R600_QUERY_CURRENT_GPU_SCLK:
case R600_QUERY_CURRENT_GPU_MCLK:
case R600_QUERY_BUFFER_WAIT_TIME:
+ case R600_QUERY_GFX_IB_SIZE:
case R600_QUERY_NUM_MAPPED_BUFFERS:
case R600_QUERY_NUM_GFX_IBS:
case R600_QUERY_NUM_SDMA_IBS:
case R600_QUERY_GPU_SURF_SYNC_BUSY:
case R600_QUERY_GPU_CP_DMA_BUSY:
case R600_QUERY_GPU_SCRATCH_RAM_BUSY:
- query->end_result = r600_end_counter(rctx->screen,
+ query->end_result = si_end_counter(rctx->screen,
query->b.type,
query->begin_result);
query->begin_result = 0;
return (struct pipe_query *)query;
}
-void r600_query_hw_destroy(struct r600_common_screen *rscreen,
- struct r600_query *rquery)
+void si_query_hw_destroy(struct si_screen *sscreen,
+ struct r600_query *rquery)
{
struct r600_query_hw *query = (struct r600_query_hw *)rquery;
struct r600_query_buffer *prev = query->buffer.previous;
FREE(rquery);
}
-static struct r600_resource *r600_new_query_buffer(struct r600_common_screen *rscreen,
+static struct r600_resource *r600_new_query_buffer(struct si_screen *sscreen,
struct r600_query_hw *query)
{
unsigned buf_size = MAX2(query->result_size,
- rscreen->info.min_alloc_size);
+ sscreen->info.min_alloc_size);
/* Queries are normally read by the CPU after
* being written by the gpu, hence staging is probably a good
* usage pattern.
*/
struct r600_resource *buf = (struct r600_resource*)
- pipe_buffer_create(&rscreen->b, 0,
+ pipe_buffer_create(&sscreen->b, 0,
PIPE_USAGE_STAGING, buf_size);
if (!buf)
return NULL;
- if (!query->ops->prepare_buffer(rscreen, query, buf)) {
+ if (!query->ops->prepare_buffer(sscreen, query, buf)) {
r600_resource_reference(&buf, NULL);
return NULL;
}
return buf;
}
-static bool r600_query_hw_prepare_buffer(struct r600_common_screen *rscreen,
+static bool r600_query_hw_prepare_buffer(struct si_screen *sscreen,
struct r600_query_hw *query,
struct r600_resource *buffer)
{
/* Callers ensure that the buffer is currently unused by the GPU. */
- uint32_t *results = rscreen->ws->buffer_map(buffer->buf, NULL,
+ uint32_t *results = sscreen->ws->buffer_map(buffer->buf, NULL,
PIPE_TRANSFER_WRITE |
PIPE_TRANSFER_UNSYNCHRONIZED);
if (!results)
if (query->b.type == PIPE_QUERY_OCCLUSION_COUNTER ||
query->b.type == PIPE_QUERY_OCCLUSION_PREDICATE ||
query->b.type == PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE) {
- unsigned max_rbs = rscreen->info.num_render_backends;
- unsigned enabled_rb_mask = rscreen->info.enabled_rb_mask;
+ unsigned max_rbs = sscreen->info.num_render_backends;
+ unsigned enabled_rb_mask = sscreen->info.enabled_rb_mask;
unsigned num_results;
unsigned i, j;
unsigned offset);
static struct r600_query_ops query_hw_ops = {
- .destroy = r600_query_hw_destroy,
- .begin = r600_query_hw_begin,
- .end = r600_query_hw_end,
- .get_result = r600_query_hw_get_result,
+ .destroy = si_query_hw_destroy,
+ .begin = si_query_hw_begin,
+ .end = si_query_hw_end,
+ .get_result = si_query_hw_get_result,
.get_result_resource = r600_query_hw_get_result_resource,
};
struct r600_query_hw *query,
struct r600_resource *buffer,
uint64_t va);
-static void r600_query_hw_add_result(struct r600_common_screen *rscreen,
+static void r600_query_hw_add_result(struct si_screen *sscreen,
struct r600_query_hw *, void *buffer,
union pipe_query_result *result);
static void r600_query_hw_clear_result(struct r600_query_hw *,
.add_result = r600_query_hw_add_result,
};
-bool r600_query_hw_init(struct r600_common_screen *rscreen,
- struct r600_query_hw *query)
+bool si_query_hw_init(struct si_screen *sscreen,
+ struct r600_query_hw *query)
{
- query->buffer.buf = r600_new_query_buffer(rscreen, query);
+ query->buffer.buf = r600_new_query_buffer(sscreen, query);
if (!query->buffer.buf)
return false;
return true;
}
-static struct pipe_query *r600_query_hw_create(struct r600_common_screen *rscreen,
+static struct pipe_query *r600_query_hw_create(struct si_screen *sscreen,
unsigned query_type,
unsigned index)
{
case PIPE_QUERY_OCCLUSION_COUNTER:
case PIPE_QUERY_OCCLUSION_PREDICATE:
case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE:
- query->result_size = 16 * rscreen->info.num_render_backends;
+ query->result_size = 16 * sscreen->info.num_render_backends;
query->result_size += 16; /* for the fence + alignment */
query->num_cs_dw_begin = 6;
- query->num_cs_dw_end = 6 + r600_gfx_write_fence_dwords(rscreen);
+ query->num_cs_dw_end = 6 + si_gfx_write_fence_dwords(sscreen);
break;
case PIPE_QUERY_TIME_ELAPSED:
query->result_size = 24;
query->num_cs_dw_begin = 8;
- query->num_cs_dw_end = 8 + r600_gfx_write_fence_dwords(rscreen);
+ query->num_cs_dw_end = 8 + si_gfx_write_fence_dwords(sscreen);
break;
case PIPE_QUERY_TIMESTAMP:
query->result_size = 16;
- query->num_cs_dw_end = 8 + r600_gfx_write_fence_dwords(rscreen);
+ query->num_cs_dw_end = 8 + si_gfx_write_fence_dwords(sscreen);
query->flags = R600_QUERY_HW_FLAG_NO_START;
break;
case PIPE_QUERY_PRIMITIVES_EMITTED:
query->num_cs_dw_end = 6 * R600_MAX_STREAMS;
break;
case PIPE_QUERY_PIPELINE_STATISTICS:
- /* 11 values on EG, 8 on R600. */
- query->result_size = (rscreen->chip_class >= EVERGREEN ? 11 : 8) * 16;
+ /* 11 values on GCN. */
+ query->result_size = 11 * 16;
query->result_size += 8; /* for the fence + alignment */
query->num_cs_dw_begin = 6;
- query->num_cs_dw_end = 6 + r600_gfx_write_fence_dwords(rscreen);
+ query->num_cs_dw_end = 6 + si_gfx_write_fence_dwords(sscreen);
break;
default:
assert(0);
return NULL;
}
- if (!r600_query_hw_init(rscreen, query)) {
+ if (!si_query_hw_init(sscreen, query)) {
FREE(query);
return NULL;
}
{
switch (stream) {
default:
- case 0: return EVENT_TYPE_SAMPLE_STREAMOUTSTATS;
- case 1: return EVENT_TYPE_SAMPLE_STREAMOUTSTATS1;
- case 2: return EVENT_TYPE_SAMPLE_STREAMOUTSTATS2;
- case 3: return EVENT_TYPE_SAMPLE_STREAMOUTSTATS3;
+ case 0: return V_028A90_SAMPLE_STREAMOUTSTATS;
+ case 1: return V_028A90_SAMPLE_STREAMOUTSTATS1;
+ case 2: return V_028A90_SAMPLE_STREAMOUTSTATS2;
+ case 3: return V_028A90_SAMPLE_STREAMOUTSTATS3;
}
}
case PIPE_QUERY_OCCLUSION_PREDICATE:
case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE:
radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0));
- radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_ZPASS_DONE) | EVENT_INDEX(1));
+ radeon_emit(cs, EVENT_TYPE(V_028A90_ZPASS_DONE) | EVENT_INDEX(1));
radeon_emit(cs, va);
radeon_emit(cs, va >> 32);
break;
emit_sample_streamout(cs, va + 32 * stream, stream);
break;
case PIPE_QUERY_TIME_ELAPSED:
- if (ctx->chip_class >= SI) {
- /* Write the timestamp from the CP not waiting for
- * outstanding draws (top-of-pipe).
- */
- radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, 0));
- radeon_emit(cs, COPY_DATA_COUNT_SEL |
- COPY_DATA_SRC_SEL(COPY_DATA_TIMESTAMP) |
- COPY_DATA_DST_SEL(COPY_DATA_MEM_ASYNC));
- radeon_emit(cs, 0);
- radeon_emit(cs, 0);
- radeon_emit(cs, va);
- radeon_emit(cs, va >> 32);
- } else {
- /* Write the timestamp after the last draw is done.
- * (bottom-of-pipe)
- */
- r600_gfx_write_event_eop(ctx, EVENT_TYPE_BOTTOM_OF_PIPE_TS,
- 0, EOP_DATA_SEL_TIMESTAMP,
- NULL, va, 0, query->b.type);
- }
+ /* Write the timestamp from the CP not waiting for
+ * outstanding draws (top-of-pipe).
+ */
+ radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, 0));
+ radeon_emit(cs, COPY_DATA_COUNT_SEL |
+ COPY_DATA_SRC_SEL(COPY_DATA_TIMESTAMP) |
+ COPY_DATA_DST_SEL(COPY_DATA_MEM_ASYNC));
+ radeon_emit(cs, 0);
+ radeon_emit(cs, 0);
+ radeon_emit(cs, va);
+ radeon_emit(cs, va >> 32);
break;
case PIPE_QUERY_PIPELINE_STATISTICS:
radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0));
- radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_SAMPLE_PIPELINESTAT) | EVENT_INDEX(2));
+ radeon_emit(cs, EVENT_TYPE(V_028A90_SAMPLE_PIPELINESTAT) | EVENT_INDEX(2));
radeon_emit(cs, va);
radeon_emit(cs, va >> 32);
break;
default:
assert(0);
}
- r600_emit_reloc(ctx, &ctx->gfx, query->buffer.buf, RADEON_USAGE_WRITE,
- RADEON_PRIO_QUERY);
+ radeon_add_to_buffer_list(ctx, &ctx->gfx, query->buffer.buf, RADEON_USAGE_WRITE,
+ RADEON_PRIO_QUERY);
}
static void r600_query_hw_emit_start(struct r600_common_context *ctx,
return; // previous buffer allocation failure
r600_update_occlusion_query_state(ctx, query->b.type, 1);
- r600_update_prims_generated_query_state(ctx, query->b.type, 1);
+ si_update_prims_generated_query_state((void*)ctx, query->b.type, 1);
ctx->need_gfx_cs_space(&ctx->b, query->num_cs_dw_begin + query->num_cs_dw_end,
true);
case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE:
va += 8;
radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0));
- radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_ZPASS_DONE) | EVENT_INDEX(1));
+ radeon_emit(cs, EVENT_TYPE(V_028A90_ZPASS_DONE) | EVENT_INDEX(1));
radeon_emit(cs, va);
radeon_emit(cs, va >> 32);
va += 8;
/* fall through */
case PIPE_QUERY_TIMESTAMP:
- r600_gfx_write_event_eop(ctx, EVENT_TYPE_BOTTOM_OF_PIPE_TS,
+ si_gfx_write_event_eop(ctx, V_028A90_BOTTOM_OF_PIPE_TS,
0, EOP_DATA_SEL_TIMESTAMP, NULL, va,
0, query->b.type);
fence_va = va + 8;
va += sample_size;
radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0));
- radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_SAMPLE_PIPELINESTAT) | EVENT_INDEX(2));
+ radeon_emit(cs, EVENT_TYPE(V_028A90_SAMPLE_PIPELINESTAT) | EVENT_INDEX(2));
radeon_emit(cs, va);
radeon_emit(cs, va >> 32);
default:
assert(0);
}
- r600_emit_reloc(ctx, &ctx->gfx, query->buffer.buf, RADEON_USAGE_WRITE,
- RADEON_PRIO_QUERY);
+ radeon_add_to_buffer_list(ctx, &ctx->gfx, query->buffer.buf, RADEON_USAGE_WRITE,
+ RADEON_PRIO_QUERY);
if (fence_va)
- r600_gfx_write_event_eop(ctx, EVENT_TYPE_BOTTOM_OF_PIPE_TS, 0,
+ si_gfx_write_event_eop(ctx, V_028A90_BOTTOM_OF_PIPE_TS, 0,
EOP_DATA_SEL_VALUE_32BIT,
query->buffer.buf, fence_va, 0x80000000,
query->b.type);
ctx->num_cs_dw_queries_suspend -= query->num_cs_dw_end;
r600_update_occlusion_query_state(ctx, query->b.type, -1);
- r600_update_prims_generated_query_state(ctx, query->b.type, -1);
+ si_update_prims_generated_query_state((void*)ctx, query->b.type, -1);
}
static void emit_set_predicate(struct r600_common_context *ctx,
radeon_emit(cs, va);
radeon_emit(cs, op | ((va >> 32) & 0xFF));
}
- r600_emit_reloc(ctx, &ctx->gfx, buf, RADEON_USAGE_READ,
- RADEON_PRIO_QUERY);
+ radeon_add_to_buffer_list(ctx, &ctx->gfx, buf, RADEON_USAGE_READ,
+ RADEON_PRIO_QUERY);
}
static void r600_emit_query_predication(struct r600_common_context *ctx,
static struct pipe_query *r600_create_query(struct pipe_context *ctx, unsigned query_type, unsigned index)
{
- struct r600_common_screen *rscreen =
- (struct r600_common_screen *)ctx->screen;
+ struct si_screen *sscreen =
+ (struct si_screen *)ctx->screen;
if (query_type == PIPE_QUERY_TIMESTAMP_DISJOINT ||
query_type == PIPE_QUERY_GPU_FINISHED ||
query_type >= PIPE_QUERY_DRIVER_SPECIFIC)
return r600_query_sw_create(query_type);
- return r600_query_hw_create(rscreen, query_type, index);
+ return r600_query_hw_create(sscreen, query_type, index);
}
static void r600_destroy_query(struct pipe_context *ctx, struct pipe_query *query)
return rquery->ops->begin(rctx, rquery);
}
-void r600_query_hw_reset_buffers(struct r600_common_context *rctx,
- struct r600_query_hw *query)
+void si_query_hw_reset_buffers(struct r600_common_context *rctx,
+ struct r600_query_hw *query)
{
struct r600_query_buffer *prev = query->buffer.previous;
query->buffer.previous = NULL;
/* Obtain a new buffer if the current one can't be mapped without a stall. */
- if (r600_rings_is_buffer_referenced(rctx, query->buffer.buf->buf, RADEON_USAGE_READWRITE) ||
+ if (si_rings_is_buffer_referenced(rctx, query->buffer.buf->buf, RADEON_USAGE_READWRITE) ||
!rctx->ws->buffer_wait(query->buffer.buf->buf, 0, RADEON_USAGE_READWRITE)) {
r600_resource_reference(&query->buffer.buf, NULL);
query->buffer.buf = r600_new_query_buffer(rctx->screen, query);
}
}
-bool r600_query_hw_begin(struct r600_common_context *rctx,
- struct r600_query *rquery)
+bool si_query_hw_begin(struct r600_common_context *rctx,
+ struct r600_query *rquery)
{
struct r600_query_hw *query = (struct r600_query_hw *)rquery;
}
if (!(query->flags & R600_QUERY_HW_FLAG_BEGIN_RESUMES))
- r600_query_hw_reset_buffers(rctx, query);
+ si_query_hw_reset_buffers(rctx, query);
r600_resource_reference(&query->workaround_buf, NULL);
return rquery->ops->end(rctx, rquery);
}
-bool r600_query_hw_end(struct r600_common_context *rctx,
- struct r600_query *rquery)
+bool si_query_hw_end(struct r600_common_context *rctx,
+ struct r600_query *rquery)
{
struct r600_query_hw *query = (struct r600_query_hw *)rquery;
if (query->flags & R600_QUERY_HW_FLAG_NO_START)
- r600_query_hw_reset_buffers(rctx, query);
+ si_query_hw_reset_buffers(rctx, query);
r600_query_hw_emit_stop(rctx, query);
return 0;
}
-static void r600_query_hw_add_result(struct r600_common_screen *rscreen,
+static void r600_query_hw_add_result(struct si_screen *sscreen,
struct r600_query_hw *query,
void *buffer,
union pipe_query_result *result)
{
- unsigned max_rbs = rscreen->info.num_render_backends;
+ unsigned max_rbs = sscreen->info.num_render_backends;
switch (query->b.type) {
case PIPE_QUERY_OCCLUSION_COUNTER: {
}
break;
case PIPE_QUERY_PIPELINE_STATISTICS:
- if (rscreen->chip_class >= EVERGREEN) {
- result->pipeline_statistics.ps_invocations +=
- r600_query_read_result(buffer, 0, 22, false);
- result->pipeline_statistics.c_primitives +=
- r600_query_read_result(buffer, 2, 24, false);
- result->pipeline_statistics.c_invocations +=
- r600_query_read_result(buffer, 4, 26, false);
- result->pipeline_statistics.vs_invocations +=
- r600_query_read_result(buffer, 6, 28, false);
- result->pipeline_statistics.gs_invocations +=
- r600_query_read_result(buffer, 8, 30, false);
- result->pipeline_statistics.gs_primitives +=
- r600_query_read_result(buffer, 10, 32, false);
- result->pipeline_statistics.ia_primitives +=
- r600_query_read_result(buffer, 12, 34, false);
- result->pipeline_statistics.ia_vertices +=
- r600_query_read_result(buffer, 14, 36, false);
- result->pipeline_statistics.hs_invocations +=
- r600_query_read_result(buffer, 16, 38, false);
- result->pipeline_statistics.ds_invocations +=
- r600_query_read_result(buffer, 18, 40, false);
- result->pipeline_statistics.cs_invocations +=
- r600_query_read_result(buffer, 20, 42, false);
- } else {
- result->pipeline_statistics.ps_invocations +=
- r600_query_read_result(buffer, 0, 16, false);
- result->pipeline_statistics.c_primitives +=
- r600_query_read_result(buffer, 2, 18, false);
- result->pipeline_statistics.c_invocations +=
- r600_query_read_result(buffer, 4, 20, false);
- result->pipeline_statistics.vs_invocations +=
- r600_query_read_result(buffer, 6, 22, false);
- result->pipeline_statistics.gs_invocations +=
- r600_query_read_result(buffer, 8, 24, false);
- result->pipeline_statistics.gs_primitives +=
- r600_query_read_result(buffer, 10, 26, false);
- result->pipeline_statistics.ia_primitives +=
- r600_query_read_result(buffer, 12, 28, false);
- result->pipeline_statistics.ia_vertices +=
- r600_query_read_result(buffer, 14, 30, false);
- }
+ result->pipeline_statistics.ps_invocations +=
+ r600_query_read_result(buffer, 0, 22, false);
+ result->pipeline_statistics.c_primitives +=
+ r600_query_read_result(buffer, 2, 24, false);
+ result->pipeline_statistics.c_invocations +=
+ r600_query_read_result(buffer, 4, 26, false);
+ result->pipeline_statistics.vs_invocations +=
+ r600_query_read_result(buffer, 6, 28, false);
+ result->pipeline_statistics.gs_invocations +=
+ r600_query_read_result(buffer, 8, 30, false);
+ result->pipeline_statistics.gs_primitives +=
+ r600_query_read_result(buffer, 10, 32, false);
+ result->pipeline_statistics.ia_primitives +=
+ r600_query_read_result(buffer, 12, 34, false);
+ result->pipeline_statistics.ia_vertices +=
+ r600_query_read_result(buffer, 14, 36, false);
+ result->pipeline_statistics.hs_invocations +=
+ r600_query_read_result(buffer, 16, 38, false);
+ result->pipeline_statistics.ds_invocations +=
+ r600_query_read_result(buffer, 18, 40, false);
+ result->pipeline_statistics.cs_invocations +=
+ r600_query_read_result(buffer, 20, 42, false);
#if 0 /* for testing */
printf("Pipeline stats: IA verts=%llu, IA prims=%llu, VS=%llu, HS=%llu, "
"DS=%llu, GS=%llu, GS prims=%llu, Clipper=%llu, "
util_query_clear_result(result, query->b.type);
}
-bool r600_query_hw_get_result(struct r600_common_context *rctx,
- struct r600_query *rquery,
- bool wait, union pipe_query_result *result)
+bool si_query_hw_get_result(struct r600_common_context *rctx,
+ struct r600_query *rquery,
+ bool wait, union pipe_query_result *result)
{
- struct r600_common_screen *rscreen = rctx->screen;
+ struct si_screen *sscreen = rctx->screen;
struct r600_query_hw *query = (struct r600_query_hw *)rquery;
struct r600_query_buffer *qbuf;
if (rquery->b.flushed)
map = rctx->ws->buffer_map(qbuf->buf->buf, NULL, usage);
else
- map = r600_buffer_map_sync_with_rings(rctx, qbuf->buf, usage);
+ map = si_buffer_map_sync_with_rings(rctx, qbuf->buf, usage);
if (!map)
return false;
while (results_base != qbuf->results_end) {
- query->ops->add_result(rscreen, query, map + results_base,
+ query->ops->add_result(sscreen, query, map + results_base,
result);
results_base += query->result_size;
}
/* Convert the time to expected units. */
if (rquery->type == PIPE_QUERY_TIME_ELAPSED ||
rquery->type == PIPE_QUERY_TIMESTAMP) {
- result->u64 = (1000000 * result->u64) / rscreen->info.clock_crystal_freq;
+ result->u64 = (1000000 * result->u64) / sscreen->info.clock_crystal_freq;
}
return true;
}
va = qbuf->buf->gpu_address + qbuf->results_end - query->result_size;
va += params.fence_offset;
- r600_gfx_wait_fence(rctx, va, 0x80000000, 0x80000000);
+ si_gfx_wait_fence(rctx, va, 0x80000000, 0x80000000);
}
rctx->b.launch_grid(&rctx->b, &grid);
- rctx->flags |= rctx->screen->barrier_flags.compute_to_L2;
+ rctx->flags |= SI_CONTEXT_CS_PARTIAL_FLUSH;
}
r600_restore_qbo_state(rctx, &saved_state);
{
struct r600_common_context *rctx = (struct r600_common_context *)ctx;
struct r600_query_hw *rquery = (struct r600_query_hw *)query;
- struct r600_query_buffer *qbuf;
struct r600_atom *atom = &rctx->render_cond_atom;
- /* Compute the size of SET_PREDICATION packets. */
- atom->num_dw = 0;
if (query) {
bool needs_workaround = false;
/* Settings this in the render cond atom is too late,
* so set it here. */
rctx->flags |= rctx->screen->barrier_flags.L2_to_cp |
- R600_CONTEXT_FLUSH_FOR_RENDER_COND;
+ SI_CONTEXT_FLUSH_FOR_RENDER_COND;
rctx->render_cond_force_off = old_force_off;
}
-
- if (needs_workaround) {
- atom->num_dw = 5;
- } else {
- for (qbuf = &rquery->buffer; qbuf; qbuf = qbuf->previous)
- atom->num_dw += (qbuf->results_end / rquery->result_size) * 5;
-
- if (rquery->b.type == PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE)
- atom->num_dw *= R600_MAX_STREAMS;
- }
}
rctx->render_cond = query;
rctx->set_atom_dirty(rctx, atom, query != NULL);
}
-void r600_suspend_queries(struct r600_common_context *ctx)
+void si_suspend_queries(struct r600_common_context *ctx)
{
struct r600_query_hw *query;
*/
num_dw += query->num_cs_dw_end;
}
- /* primitives generated query */
- num_dw += ctx->streamout.enable_atom.num_dw;
/* guess for ZPASS enable or PERFECT_ZPASS_COUNT enable updates */
num_dw += 13;
return num_dw;
}
-void r600_resume_queries(struct r600_common_context *ctx)
+void si_resume_queries(struct r600_common_context *ctx)
{
struct r600_query_hw *query;
unsigned num_cs_dw = r600_queries_num_cs_dw_for_resuming(ctx, &ctx->active_queries);
}
}
-/* Fix radeon_info::enabled_rb_mask for R600, R700, EVERGREEN, NI. */
-void r600_query_fix_enabled_rb_mask(struct r600_common_screen *rscreen)
-{
- struct r600_common_context *ctx =
- (struct r600_common_context*)rscreen->aux_context;
- struct radeon_winsys_cs *cs = ctx->gfx.cs;
- struct r600_resource *buffer;
- uint32_t *results;
- unsigned i, mask = 0;
- unsigned max_rbs = ctx->screen->info.num_render_backends;
-
- assert(rscreen->chip_class <= CAYMAN);
-
- /* if backend_map query is supported by the kernel */
- if (rscreen->info.r600_gb_backend_map_valid) {
- unsigned num_tile_pipes = rscreen->info.num_tile_pipes;
- unsigned backend_map = rscreen->info.r600_gb_backend_map;
- unsigned item_width, item_mask;
-
- if (ctx->chip_class >= EVERGREEN) {
- item_width = 4;
- item_mask = 0x7;
- } else {
- item_width = 2;
- item_mask = 0x3;
- }
-
- while (num_tile_pipes--) {
- i = backend_map & item_mask;
- mask |= (1<<i);
- backend_map >>= item_width;
- }
- if (mask != 0) {
- rscreen->info.enabled_rb_mask = mask;
- return;
- }
- }
-
- /* otherwise backup path for older kernels */
-
- /* create buffer for event data */
- buffer = (struct r600_resource*)
- pipe_buffer_create(ctx->b.screen, 0,
- PIPE_USAGE_STAGING, max_rbs * 16);
- if (!buffer)
- return;
-
- /* initialize buffer with zeroes */
- results = r600_buffer_map_sync_with_rings(ctx, buffer, PIPE_TRANSFER_WRITE);
- if (results) {
- memset(results, 0, max_rbs * 4 * 4);
-
- /* emit EVENT_WRITE for ZPASS_DONE */
- radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0));
- radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_ZPASS_DONE) | EVENT_INDEX(1));
- radeon_emit(cs, buffer->gpu_address);
- radeon_emit(cs, buffer->gpu_address >> 32);
-
- r600_emit_reloc(ctx, &ctx->gfx, buffer,
- RADEON_USAGE_WRITE, RADEON_PRIO_QUERY);
-
- /* analyze results */
- results = r600_buffer_map_sync_with_rings(ctx, buffer, PIPE_TRANSFER_READ);
- if (results) {
- for(i = 0; i < max_rbs; i++) {
- /* at least highest bit will be set if backend is used */
- if (results[i*4 + 1])
- mask |= (1<<i);
- }
- }
- }
-
- r600_resource_reference(&buffer, NULL);
-
- if (mask)
- rscreen->info.enabled_rb_mask = mask;
-}
-
#define XFULL(name_, query_type_, type_, result_type_, group_id_) \
{ \
.name = name_, \
X("num-GFX-IBs", NUM_GFX_IBS, UINT64, AVERAGE),
X("num-SDMA-IBs", NUM_SDMA_IBS, UINT64, AVERAGE),
X("GFX-BO-list-size", GFX_BO_LIST_SIZE, UINT64, AVERAGE),
+ X("GFX-IB-size", GFX_IB_SIZE, UINT64, AVERAGE),
X("num-bytes-moved", NUM_BYTES_MOVED, BYTES, CUMULATIVE),
X("num-evictions", NUM_EVICTIONS, UINT64, CUMULATIVE),
X("VRAM-CPU-page-faults", NUM_VRAM_CPU_PAGE_FAULTS, UINT64, CUMULATIVE),
#undef XG
#undef XFULL
-static unsigned r600_get_num_queries(struct r600_common_screen *rscreen)
+static unsigned r600_get_num_queries(struct si_screen *sscreen)
{
- if (rscreen->info.drm_major == 2 && rscreen->info.drm_minor >= 42)
+ if (sscreen->info.drm_major == 2 && sscreen->info.drm_minor >= 42)
return ARRAY_SIZE(r600_driver_query_list);
- else if (rscreen->info.drm_major == 3) {
- if (rscreen->chip_class >= VI)
+ else if (sscreen->info.drm_major == 3) {
+ if (sscreen->info.chip_class >= VI)
return ARRAY_SIZE(r600_driver_query_list);
else
return ARRAY_SIZE(r600_driver_query_list) - 7;
unsigned index,
struct pipe_driver_query_info *info)
{
- struct r600_common_screen *rscreen = (struct r600_common_screen*)screen;
- unsigned num_queries = r600_get_num_queries(rscreen);
+ struct si_screen *sscreen = (struct si_screen*)screen;
+ unsigned num_queries = r600_get_num_queries(sscreen);
if (!info) {
unsigned num_perfcounters =
- r600_get_perfcounter_info(rscreen, 0, NULL);
+ si_get_perfcounter_info(sscreen, 0, NULL);
return num_queries + num_perfcounters;
}
if (index >= num_queries)
- return r600_get_perfcounter_info(rscreen, index - num_queries, info);
+ return si_get_perfcounter_info(sscreen, index - num_queries, info);
*info = r600_driver_query_list[index];
case R600_QUERY_REQUESTED_VRAM:
case R600_QUERY_VRAM_USAGE:
case R600_QUERY_MAPPED_VRAM:
- info->max_value.u64 = rscreen->info.vram_size;
+ info->max_value.u64 = sscreen->info.vram_size;
break;
case R600_QUERY_REQUESTED_GTT:
case R600_QUERY_GTT_USAGE:
case R600_QUERY_MAPPED_GTT:
- info->max_value.u64 = rscreen->info.gart_size;
+ info->max_value.u64 = sscreen->info.gart_size;
break;
case R600_QUERY_GPU_TEMPERATURE:
info->max_value.u64 = 125;
break;
case R600_QUERY_VRAM_VIS_USAGE:
- info->max_value.u64 = rscreen->info.vram_vis_size;
+ info->max_value.u64 = sscreen->info.vram_vis_size;
break;
}
- if (info->group_id != ~(unsigned)0 && rscreen->perfcounters)
- info->group_id += rscreen->perfcounters->num_groups;
+ if (info->group_id != ~(unsigned)0 && sscreen->perfcounters)
+ info->group_id += sscreen->perfcounters->num_groups;
return 1;
}
unsigned index,
struct pipe_driver_query_group_info *info)
{
- struct r600_common_screen *rscreen = (struct r600_common_screen *)screen;
+ struct si_screen *sscreen = (struct si_screen *)screen;
unsigned num_pc_groups = 0;
- if (rscreen->perfcounters)
- num_pc_groups = rscreen->perfcounters->num_groups;
+ if (sscreen->perfcounters)
+ num_pc_groups = sscreen->perfcounters->num_groups;
if (!info)
return num_pc_groups + R600_NUM_SW_QUERY_GROUPS;
if (index < num_pc_groups)
- return r600_get_perfcounter_group_info(rscreen, index, info);
+ return si_get_perfcounter_group_info(sscreen, index, info);
index -= num_pc_groups;
if (index >= R600_NUM_SW_QUERY_GROUPS)
return 1;
}
-void r600_query_init(struct r600_common_context *rctx)
+void si_init_query_functions(struct r600_common_context *rctx)
{
rctx->b.create_query = r600_create_query;
- rctx->b.create_batch_query = r600_create_batch_query;
+ rctx->b.create_batch_query = si_create_batch_query;
rctx->b.destroy_query = r600_destroy_query;
rctx->b.begin_query = r600_begin_query;
rctx->b.end_query = r600_end_query;
rctx->b.get_query_result_resource = r600_get_query_result_resource;
rctx->render_cond_atom.emit = r600_emit_query_predication;
- if (((struct r600_common_screen*)rctx->b.screen)->info.num_render_backends > 0)
+ if (((struct si_screen*)rctx->b.screen)->info.num_render_backends > 0)
rctx->b.render_condition = r600_render_condition;
LIST_INITHEAD(&rctx->active_queries);
}
-void r600_init_screen_query_functions(struct r600_common_screen *rscreen)
+void si_init_screen_query_functions(struct si_screen *sscreen)
{
- rscreen->b.get_driver_query_info = r600_get_driver_query_info;
- rscreen->b.get_driver_query_group_info = r600_get_driver_query_group_info;
+ sscreen->b.get_driver_query_info = r600_get_driver_query_info;
+ sscreen->b.get_driver_query_group_info = r600_get_driver_query_group_info;
}
projects / mesa.git / blobdiff