radeon_emit(cs, va >> 8); /* BUFFER_BASE */
r600_emit_reloc(rctx, &rctx->rings.gfx, r600_resource(t[i]->b.buffer),
- RADEON_USAGE_WRITE, RADEON_PRIO_SHADER_RESOURCE_RW);
+ RADEON_USAGE_WRITE, RADEON_PRIO_RINGS_STREAMOUT);
/* R7xx requires this packet after updating BUFFER_BASE.
* Without this, R7xx locks up. */
radeon_emit(cs, va >> 8);
r600_emit_reloc(rctx, &rctx->rings.gfx, r600_resource(t[i]->b.buffer),
- RADEON_USAGE_WRITE, RADEON_PRIO_SHADER_RESOURCE_RW);
+ RADEON_USAGE_WRITE, RADEON_PRIO_RINGS_STREAMOUT);
}
}
radeon_emit(cs, va >> 32); /* src address hi */
r600_emit_reloc(rctx, &rctx->rings.gfx, t[i]->buf_filled_size,
- RADEON_USAGE_READ, RADEON_PRIO_MIN);
+ RADEON_USAGE_READ, RADEON_PRIO_SO_FILLED_SIZE);
} else {
/* Start from the beginning. */
radeon_emit(cs, PKT3(PKT3_STRMOUT_BUFFER_UPDATE, 4, 0));
radeon_emit(cs, 0); /* unused */
r600_emit_reloc(rctx, &rctx->rings.gfx, t[i]->buf_filled_size,
- RADEON_USAGE_WRITE, RADEON_PRIO_MIN);
+ RADEON_USAGE_WRITE, RADEON_PRIO_SO_FILLED_SIZE);
/* Zero the buffer size. The counters (primitives generated,
* primitives emitted) may be enabled even if there is not