r600g/llvm: get use_kill from compiler shader

[mesa.git] / src / gallium / drivers / radeon / radeon_llvm.h

diff --git a/src/gallium/drivers/radeon/radeon_llvm.h b/src/gallium/drivers/radeon/radeon_llvm.h
index 7a32bb083b26ab212fe33ac7f035df897d1ac454..1d4bd456670b7f45fd3ca10b9990ed1808b095e7 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_llvm.h
+++ b/src/gallium/drivers/radeon/radeon_llvm.h
@@ -31,10 +31,11 @@
 #include "gallivm/lp_bld_init.h"
 #include "gallivm/lp_bld_tgsi.h"
 
-#define RADEON_LLVM_MAX_INPUTS 16 * 4
-#define RADEON_LLVM_MAX_OUTPUTS 16 * 4
+#define RADEON_LLVM_MAX_INPUTS 32 * 4
+#define RADEON_LLVM_MAX_OUTPUTS 32 * 4
 #define RADEON_LLVM_MAX_BRANCH_DEPTH 16
 #define RADEON_LLVM_MAX_LOOP_DEPTH 16
+#define RADEON_LLVM_MAX_ARRAYS 16
 
 #define RADEON_LLVM_MAX_SYSTEM_VALUES 4
 
@@ -54,6 +55,18 @@ struct radeon_llvm_context {
 
        struct lp_build_tgsi_soa_context soa;
 
+       unsigned chip_class;
+       unsigned type;
+       unsigned face_gpr;
+       unsigned two_side;
+       unsigned clip_vertex;
+       struct r600_shader_io * r600_inputs;
+       struct r600_shader_io * r600_outputs;
+       struct pipe_stream_output_info *stream_outputs;
+       unsigned color_buffer_count;
+       unsigned fs_color_all;
+       unsigned alpha_to_one;
+
        /*=== Front end configuration ===*/
 
        /* Special Intrinsics */
@@ -97,7 +110,6 @@ struct radeon_llvm_context {
 
        LLVMValueRef system_values[RADEON_LLVM_MAX_SYSTEM_VALUES];
 
-       unsigned reserved_reg_count;
        /*=== Private Members ===*/
 
        struct radeon_llvm_branch branch[RADEON_LLVM_MAX_BRANCH_DEPTH];
@@ -106,35 +118,40 @@ struct radeon_llvm_context {
        unsigned branch_depth;
        unsigned loop_depth;
 
+       struct tgsi_declaration_range arrays[RADEON_LLVM_MAX_ARRAYS];
+       unsigned num_arrays;
 
        LLVMValueRef main_fn;
 
        struct gallivm_state gallivm;
 };
 
-static inline LLVMValueRef bitcast(
+static inline LLVMTypeRef tgsi2llvmtype(
                struct lp_build_tgsi_context * bld_base,
-               enum tgsi_opcode_type type,
-               LLVMValueRef value
-)
+               enum tgsi_opcode_type type)
 {
-       LLVMBuilderRef builder = bld_base->base.gallivm->builder;
        LLVMContextRef ctx = bld_base->base.gallivm->context;
-       LLVMTypeRef dst_type;
 
        switch (type) {
        case TGSI_TYPE_UNSIGNED:
        case TGSI_TYPE_SIGNED:
-               dst_type = LLVMInt32TypeInContext(ctx);
-               break;
+               return LLVMInt32TypeInContext(ctx);
        case TGSI_TYPE_UNTYPED:
        case TGSI_TYPE_FLOAT:
-               dst_type = LLVMFloatTypeInContext(ctx);
-               break;
-       default:
-               dst_type = 0;
-               break;
+               return LLVMFloatTypeInContext(ctx);
+       default: break;
        }
+       return 0;
+}
+
+static inline LLVMValueRef bitcast(
+               struct lp_build_tgsi_context * bld_base,
+               enum tgsi_opcode_type type,
+               LLVMValueRef value
+)
+{
+       LLVMBuilderRef builder = bld_base->base.gallivm->builder;
+       LLVMTypeRef dst_type = tgsi2llvmtype(bld_base, type);
 
        if (dst_type)
                return LLVMBuildBitCast(builder, value, dst_type, "");
@@ -143,8 +160,15 @@ static inline LLVMValueRef bitcast(
 }
 
 
+void radeon_llvm_emit_prepare_cube_coords(struct lp_build_tgsi_context * bld_base,
+                                          struct lp_build_emit_data * emit_data,
+                                          LLVMValueRef *coords_arg);
+
 void radeon_llvm_context_init(struct radeon_llvm_context * ctx);
 
+void radeon_llvm_create_func(struct radeon_llvm_context * ctx,
+                             LLVMTypeRef *ParamTypes, unsigned ParamCount);
+
 void radeon_llvm_dispose(struct radeon_llvm_context * ctx);
 
 inline static struct radeon_llvm_context * radeon_llvm_context(