radeon/llvm: Move lowering of SETCC node to R600ISelLowering

[mesa.git] / src / gallium / drivers / radeon / radeon_llvm.h

diff --git a/src/gallium/drivers/radeon/radeon_llvm.h b/src/gallium/drivers/radeon/radeon_llvm.h
index 14c9ecbb865dd3e2dc640325579fe83da56e058c..7a32bb083b26ab212fe33ac7f035df897d1ac454 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_llvm.h
+++ b/src/gallium/drivers/radeon/radeon_llvm.h
@@ -24,8 +24,8 @@
  *
  */
 
-#ifndef LLVM_GPU_H
-#define LLVM_GPU_H
+#ifndef RADEON_LLVM_H
+#define RADEON_LLVM_H
 
 #include <llvm-c/Core.h>
 #include "gallivm/lp_bld_init.h"
@@ -36,9 +36,7 @@
 #define RADEON_LLVM_MAX_BRANCH_DEPTH 16
 #define RADEON_LLVM_MAX_LOOP_DEPTH 16
 
-#ifdef __cplusplus
-extern "C" {
-#endif
+#define RADEON_LLVM_MAX_SYSTEM_VALUES 4
 
 struct radeon_llvm_branch {
        LLVMBasicBlockRef endif_block;
@@ -82,6 +80,9 @@ struct radeon_llvm_context {
                        unsigned input_index,
                        const struct tgsi_full_declaration *decl);
 
+       void (*load_system_value)(struct radeon_llvm_context *,
+                       unsigned index,
+                       const struct tgsi_full_declaration *decl);
 
        /** User data to use with the callbacks */
        void * userdata;
@@ -94,6 +95,8 @@ struct radeon_llvm_context {
        LLVMValueRef outputs[RADEON_LLVM_MAX_OUTPUTS][TGSI_NUM_CHANNELS];
        unsigned output_reg_count;
 
+       LLVMValueRef system_values[RADEON_LLVM_MAX_SYSTEM_VALUES];
+
        unsigned reserved_reg_count;
        /*=== Private Members ===*/
 
@@ -109,12 +112,36 @@ struct radeon_llvm_context {
        struct gallivm_state gallivm;
 };
 
-unsigned  radeon_llvm_compile(
-       LLVMModuleRef M,
-       unsigned char ** bytes,
-       unsigned * byte_count,
-       const char * gpu_family,
-       unsigned dump);
+static inline LLVMValueRef bitcast(
+               struct lp_build_tgsi_context * bld_base,
+               enum tgsi_opcode_type type,
+               LLVMValueRef value
+)
+{
+       LLVMBuilderRef builder = bld_base->base.gallivm->builder;
+       LLVMContextRef ctx = bld_base->base.gallivm->context;
+       LLVMTypeRef dst_type;
+
+       switch (type) {
+       case TGSI_TYPE_UNSIGNED:
+       case TGSI_TYPE_SIGNED:
+               dst_type = LLVMInt32TypeInContext(ctx);
+               break;
+       case TGSI_TYPE_UNTYPED:
+       case TGSI_TYPE_FLOAT:
+               dst_type = LLVMFloatTypeInContext(ctx);
+               break;
+       default:
+               dst_type = 0;
+               break;
+       }
+
+       if (dst_type)
+               return LLVMBuildBitCast(builder, value, dst_type, "");
+       else
+               return value;
+}
+
 
 void radeon_llvm_context_init(struct radeon_llvm_context * ctx);
 
@@ -130,7 +157,20 @@ unsigned radeon_llvm_reg_index_soa(unsigned index, unsigned chan);
 
 void radeon_llvm_finalize_module(struct radeon_llvm_context * ctx);
 
-#ifdef __cplusplus
-}
-#endif
-#endif /* LLVM_GPU_H */
+LLVMValueRef
+build_intrinsic(LLVMBuilderRef builder,
+               const char *name,
+               LLVMTypeRef ret_type,
+               LLVMValueRef *args,
+               unsigned num_args,
+               LLVMAttribute attr);
+
+void
+build_tgsi_intrinsic_nomem(
+               const struct lp_build_tgsi_action * action,
+               struct lp_build_tgsi_context * bld_base,
+               struct lp_build_emit_data * emit_data);
+
+
+
+#endif /* RADEON_LLVM_H */