gallium/radeon: remove radeon_surf_level::pitch_bytes

[mesa.git] / src / gallium / drivers / radeon / radeon_vce_40_2_2.c

diff --git a/src/gallium/drivers/radeon/radeon_vce_40_2_2.c b/src/gallium/drivers/radeon/radeon_vce_40_2_2.c
index 18bb28bcc88f9bf1cf2f257ccc21e65cbbbed88b..358c0fcf9dfc7f15bbccbafde665215739112366 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_vce_40_2_2.c
+++ b/src/gallium/drivers/radeon/radeon_vce_40_2_2.c
@@ -59,11 +59,11 @@ static void task_info(struct rvce_encoder *enc, uint32_t op,
        RVCE_BEGIN(0x00000002); // task info
        if (op == 0x3) {
                if (enc->task_info_idx) {
-                       uint32_t offs = enc->cs->cdw - enc->task_info_idx + 3;
+                       uint32_t offs = enc->cs->current.cdw - enc->task_info_idx + 3;
                        // Update offsetOfNextTaskInfo
-                       enc->cs->buf[enc->task_info_idx] = offs;
+                       enc->cs->current.buf[enc->task_info_idx] = offs;
                }
-               enc->task_info_idx = enc->cs->cdw;
+               enc->task_info_idx = enc->cs->current.cdw;
        }
        RVCE_CS(0xffffffff); // offsetOfNextTaskInfo
        RVCE_CS(op); // taskOperation
@@ -94,9 +94,9 @@ static void create(struct rvce_encoder *enc)
        RVCE_CS(0x00000000); // encPicStructRestriction
        RVCE_CS(enc->base.width); // encImageWidth
        RVCE_CS(enc->base.height); // encImageHeight
-       RVCE_CS(enc->luma->level[0].pitch_bytes); // encRefPicLumaPitch
-       RVCE_CS(enc->chroma->level[0].pitch_bytes); // encRefPicChromaPitch
-       RVCE_CS(align(enc->luma->npix_y, 16) / 8); // encRefYHeightInQw
+       RVCE_CS(enc->luma->level[0].nblk_x * enc->luma->bpe); // encRefPicLumaPitch
+       RVCE_CS(enc->chroma->level[0].nblk_x * enc->chroma->bpe); // encRefPicChromaPitch
+       RVCE_CS(align(enc->luma->level[0].nblk_y, 16) / 8); // encRefYHeightInQw
        RVCE_CS(0x00000000); // encRefPic(Addr|Array)Mode, encPicStructRestriction, disableRDO
        RVCE_END();
 }
@@ -323,9 +323,9 @@ static void encode(struct rvce_encoder *enc)
                  enc->luma->level[0].offset); // inputPictureLumaAddressHi/Lo
        RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM,
                  enc->chroma->level[0].offset); // inputPictureChromaAddressHi/Lo
-       RVCE_CS(align(enc->luma->npix_y, 16)); // encInputFrameYPitch
-       RVCE_CS(enc->luma->level[0].pitch_bytes); // encInputPicLumaPitch
-       RVCE_CS(enc->chroma->level[0].pitch_bytes); // encInputPicChromaPitch
+       RVCE_CS(align(enc->luma->level[0].nblk_y, 16)); // encInputFrameYPitch
+       RVCE_CS(enc->luma->level[0].nblk_x * enc->luma->bpe); // encInputPicLumaPitch
+       RVCE_CS(enc->chroma->level[0].nblk_x * enc->chroma->bpe); // encInputPicChromaPitch
        RVCE_CS(0x00000000); // encInputPic(Addr|Array)Mode
        RVCE_CS(0x00000000); // encInputPicTileConfig
        RVCE_CS(enc->pic.picture_type); // encPicType
@@ -431,6 +431,10 @@ static void destroy(struct rvce_encoder *enc)
        RVCE_END();
 }
 
+void radeon_vce_40_2_2_get_param(struct rvce_encoder *enc, struct pipe_h264_enc_picture_desc *pic)
+{
+}
+
 void radeon_vce_40_2_2_init(struct rvce_encoder *enc)
 {
        enc->session = session;