radeon/vce: make reloc offset signed
[mesa.git] / src / gallium / drivers / radeon / radeon_vce_50.c
index 84a2bfb117e467608576e6c75ff032b14c8c12ad..5bf221944189a4a6f3065e119ba2df00a2e2ec92 100644 (file)
 #include "radeon_video.h"
 #include "radeon_vce.h"
 
-static void task_info(struct rvce_encoder *enc, uint32_t taskOperation)
-{
-       RVCE_BEGIN(0x00000002); // task info
-       RVCE_CS(0xffffffff); // offsetOfNextTaskInfo
-       RVCE_CS(taskOperation); // taskOperation
-       RVCE_CS(0x00000000); // referencePictureDependency
-       RVCE_CS(0x00000000); // collocateFlagDependency
-       RVCE_CS(0x00000000); // feedbackIndex
-       RVCE_CS(0x00000000); // videoBitstreamRingIndex
-       RVCE_END();
-}
-
 static void rate_control(struct rvce_encoder *enc)
 {
        RVCE_BEGIN(0x04000005); // rate control
@@ -90,22 +78,33 @@ static void rate_control(struct rvce_encoder *enc)
 
 static void encode(struct rvce_encoder *enc)
 {
+       signed luma_offset, chroma_offset;
        int i;
-       unsigned luma_offset, chroma_offset;
 
-       task_info(enc, 0x00000003);
+       enc->task_info(enc, 0x00000003, 0, 0, 0);
 
        RVCE_BEGIN(0x05000001); // context buffer
-       RVCE_READWRITE(enc->cpb.res->cs_buf, enc->cpb.res->domains); // encodeContextAddressHi
-       RVCE_CS(0x00000000); // encodeContextAddressLo
+       RVCE_READWRITE(enc->cpb.res->cs_buf, enc->cpb.res->domains, 0); // encodeContextAddressHi/Lo
        RVCE_END();
 
        RVCE_BEGIN(0x05000004); // video bitstream buffer
-       RVCE_WRITE(enc->bs_handle, RADEON_DOMAIN_GTT); // videoBitstreamRingAddressHi
-       RVCE_CS(0x00000000); // videoBitstreamRingAddressLo
+       RVCE_WRITE(enc->bs_handle, RADEON_DOMAIN_GTT, 0); // videoBitstreamRingAddressHi/Lo
        RVCE_CS(enc->bs_size); // videoBitstreamRingSize
        RVCE_END();
 
+       if (enc->dual_pipe) {
+               unsigned aux_offset = enc->cpb.res->buf->size -
+                       RVCE_MAX_AUX_BUFFER_NUM * RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE * 2;
+               RVCE_BEGIN(0x05000002); // auxiliary buffer
+               for (i = 0; i < 8; ++i) {
+                       RVCE_CS(aux_offset);
+                       aux_offset += RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE;
+               }
+               for (i = 0; i < 8; ++i)
+                       RVCE_CS(RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE);
+               RVCE_END();
+       }
+
        RVCE_BEGIN(0x03000001); // encode
        RVCE_CS(enc->pic.frame_num ? 0x0 : 0x11); // insertHeaders
        RVCE_CS(0x00000000); // pictureStructure
@@ -114,14 +113,17 @@ static void encode(struct rvce_encoder *enc)
        RVCE_CS(0x00000000); // insertAUD
        RVCE_CS(0x00000000); // endOfSequence
        RVCE_CS(0x00000000); // endOfStream
-       RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM); // inputPictureLumaAddressHi
-       RVCE_CS(enc->luma->level[0].offset); // inputPictureLumaAddressLo
-       RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM); // inputPictureChromaAddressHi
-       RVCE_CS(enc->chroma->level[0].offset); // inputPictureChromaAddressLo
+       RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM,
+               enc->luma->level[0].offset); // inputPictureLumaAddressHi/Lo
+       RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM,
+               enc->chroma->level[0].offset); // inputPictureChromaAddressHi/Lo
        RVCE_CS(align(enc->luma->npix_y, 16)); // encInputFrameYPitch
        RVCE_CS(enc->luma->level[0].pitch_bytes); // encInputPicLumaPitch
        RVCE_CS(enc->chroma->level[0].pitch_bytes); // encInputPicChromaPitch
-       RVCE_CS(0x00010000); // encInputPic(Addr|Array)Mode,encDisable(TwoPipeMode|MBOffloading)
+       if (enc->dual_pipe)
+               RVCE_CS(0x00000000); // encInputPic(Addr|Array)Mode,encDisable(TwoPipeMode|MBOffloading)
+       else
+               RVCE_CS(0x00010000); // encInputPic(Addr|Array)Mode,encDisable(TwoPipeMode|MBOffloading)
        RVCE_CS(0x00000000); // encInputPicTileConfig
        RVCE_CS(enc->pic.picture_type); // encPicType
        RVCE_CS(enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR); // encIdrFlag