*
**************************************************************************/
-/*
- * Authors:
- * Christian König <christian.koenig@amd.com>
- *
- */
-
#include <stdio.h>
#include "pipe/p_video_codec.h"
#include "vl/vl_video_buffer.h"
-#include "r600_pipe_common.h"
+#include "si_pipe.h"
#include "radeon_video.h"
#include "radeon_vce.h"
-static void task_info(struct rvce_encoder *enc, uint32_t taskOperation)
-{
- RVCE_BEGIN(0x00000002); // task info
- RVCE_CS(0xffffffff); // offsetOfNextTaskInfo
- RVCE_CS(taskOperation); // taskOperation
- RVCE_CS(0x00000000); // referencePictureDependency
- RVCE_CS(0x00000000); // collocateFlagDependency
- RVCE_CS(0x00000000); // feedbackIndex
- RVCE_CS(0x00000000); // videoBitstreamRingIndex
- RVCE_END();
-}
-
static void rate_control(struct rvce_encoder *enc)
{
RVCE_BEGIN(0x04000005); // rate control
static void encode(struct rvce_encoder *enc)
{
+ signed luma_offset, chroma_offset, bs_offset;
+ unsigned dep, bs_idx = enc->bs_idx++;
int i;
- unsigned luma_offset, chroma_offset;
- task_info(enc, 0x00000003);
+ if (enc->dual_inst) {
+ if (bs_idx == 0)
+ dep = 1;
+ else if (enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR)
+ dep = 0;
+ else
+ dep = 2;
+ } else
+ dep = 0;
+
+ enc->task_info(enc, 0x00000003, dep, 0, bs_idx);
RVCE_BEGIN(0x05000001); // context buffer
- RVCE_READWRITE(enc->cpb.res->cs_buf, enc->cpb.res->domains, 0); // encodeContextAddressHi
- RVCE_CS(0x00000000); // encodeContextAddressLo
+ RVCE_READWRITE(enc->cpb.res->buf, enc->cpb.res->domains, 0); // encodeContextAddressHi/Lo
RVCE_END();
+ bs_offset = -(signed)(bs_idx * enc->bs_size);
+
RVCE_BEGIN(0x05000004); // video bitstream buffer
- RVCE_WRITE(enc->bs_handle, RADEON_DOMAIN_GTT, 0); // videoBitstreamRingAddressHi
- RVCE_CS(0x00000000); // videoBitstreamRingAddressLo
+ RVCE_WRITE(enc->bs_handle, RADEON_DOMAIN_GTT, bs_offset); // videoBitstreamRingAddressHi/Lo
RVCE_CS(enc->bs_size); // videoBitstreamRingSize
RVCE_END();
+ if (enc->dual_pipe) {
+ unsigned aux_offset = enc->cpb.res->buf->size -
+ RVCE_MAX_AUX_BUFFER_NUM * RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE * 2;
+ RVCE_BEGIN(0x05000002); // auxiliary buffer
+ for (i = 0; i < 8; ++i) {
+ RVCE_CS(aux_offset);
+ aux_offset += RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE;
+ }
+ for (i = 0; i < 8; ++i)
+ RVCE_CS(RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE);
+ RVCE_END();
+ }
+
RVCE_BEGIN(0x03000001); // encode
RVCE_CS(enc->pic.frame_num ? 0x0 : 0x11); // insertHeaders
RVCE_CS(0x00000000); // pictureStructure
RVCE_CS(0x00000000); // insertAUD
RVCE_CS(0x00000000); // endOfSequence
RVCE_CS(0x00000000); // endOfStream
- RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM, 0); // inputPictureLumaAddressHi
- RVCE_CS(enc->luma->level[0].offset); // inputPictureLumaAddressLo
- RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM, 0); // inputPictureChromaAddressHi
- RVCE_CS(enc->chroma->level[0].offset); // inputPictureChromaAddressLo
- RVCE_CS(align(enc->luma->npix_y, 16)); // encInputFrameYPitch
- RVCE_CS(enc->luma->level[0].pitch_bytes); // encInputPicLumaPitch
- RVCE_CS(enc->chroma->level[0].pitch_bytes); // encInputPicChromaPitch
- RVCE_CS(0x00010000); // encInputPic(Addr|Array)Mode,encDisable(TwoPipeMode|MBOffloading)
+ RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM,
+ enc->luma->u.legacy.level[0].offset); // inputPictureLumaAddressHi/Lo
+ RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM,
+ enc->chroma->u.legacy.level[0].offset); // inputPictureChromaAddressHi/Lo
+ RVCE_CS(align(enc->luma->u.legacy.level[0].nblk_y, 16)); // encInputFrameYPitch
+ RVCE_CS(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); // encInputPicLumaPitch
+ RVCE_CS(enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); // encInputPicChromaPitch
+ if (enc->dual_pipe)
+ RVCE_CS(0x00000000); // encInputPic(Addr|Array)Mode,encDisable(TwoPipeMode|MBOffloading)
+ else
+ RVCE_CS(0x00010000); // encInputPic(Addr|Array)Mode,encDisable(TwoPipeMode|MBOffloading)
RVCE_CS(0x00000000); // encInputPicTileConfig
RVCE_CS(enc->pic.picture_type); // encPicType
RVCE_CS(enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR); // encIdrFlag
RVCE_CS(0x00000000); // pictureStructure
if(enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P ||
enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_B) {
- struct rvce_cpb_slot *l0 = l0_slot(enc);
- rvce_frame_offset(enc, l0, &luma_offset, &chroma_offset);
+ struct rvce_cpb_slot *l0 = si_l0_slot(enc);
+ si_vce_frame_offset(enc, l0, &luma_offset, &chroma_offset);
RVCE_CS(l0->picture_type); // encPicType
RVCE_CS(l0->frame_num); // frameNumber
RVCE_CS(l0->pic_order_cnt); // pictureOrderCount
// encReferencePictureL1[0]
RVCE_CS(0x00000000); // pictureStructure
if(enc->pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_B) {
- struct rvce_cpb_slot *l1 = l1_slot(enc);
- rvce_frame_offset(enc, l1, &luma_offset, &chroma_offset);
+ struct rvce_cpb_slot *l1 = si_l1_slot(enc);
+ si_vce_frame_offset(enc, l1, &luma_offset, &chroma_offset);
RVCE_CS(l1->picture_type); // encPicType
RVCE_CS(l1->frame_num); // frameNumber
RVCE_CS(l1->pic_order_cnt); // pictureOrderCount
RVCE_CS(0xffffffff); // chromaOffset
}
- rvce_frame_offset(enc, current_slot(enc), &luma_offset, &chroma_offset);
+ si_vce_frame_offset(enc, si_current_slot(enc), &luma_offset, &chroma_offset);
RVCE_CS(luma_offset); // encReconstructedLumaOffset
RVCE_CS(chroma_offset); // encReconstructedChromaOffset
RVCE_CS(0x00000000); // encColocBufferOffset
RVCE_END();
}
-void radeon_vce_50_init(struct rvce_encoder *enc)
+void si_vce_50_get_param(struct rvce_encoder *enc, struct pipe_h264_enc_picture_desc *pic)
+{
+}
+
+void si_vce_50_init(struct rvce_encoder *enc)
{
- radeon_vce_40_2_2_init(enc);
+ si_vce_40_2_2_init(enc);
/* only the two below are different */
enc->rate_control = rate_control;
projects / mesa.git / blobdiff