nv50: disable compute
[mesa.git] / src / gallium / drivers / radeon / radeon_vce_52.c
index 3f2e6cbcda5a60e8acd24cb255b0ba1f3dc017b1..fc7ddc62a90b4f3795a1b16440ceecf3c396dd21 100644 (file)
 
 #include "vl/vl_video_buffer.h"
 
-#include "r600_pipe_common.h"
+#include "radeonsi/si_pipe.h"
 #include "radeon_video.h"
 #include "radeon_vce.h"
 
-static const unsigned profiles[7] = { 66, 77, 88, 100, 110, 122, 244 };
-
 static void get_rate_control_param(struct rvce_encoder *enc, struct pipe_h264_enc_picture_desc *pic)
 {
        enc->enc_pic.rc.rc_method = pic->rate_ctrl.rate_ctrl_method;
@@ -162,24 +160,23 @@ void si_vce_52_get_param(struct rvce_encoder *enc, struct pipe_h264_enc_picture_
                enc->enc_pic.addrmode_arraymode_disrdo_distwoinstants = 0x00000201;
        else
                enc->enc_pic.addrmode_arraymode_disrdo_distwoinstants = 0x01000201;
-       enc->enc_pic.is_idr = pic->is_idr;
+       enc->enc_pic.is_idr = (pic->picture_type == PIPE_H264_ENC_PICTURE_TYPE_IDR);
 }
 
 static void create(struct rvce_encoder *enc)
 {
-       struct r600_common_screen *rscreen = (struct r600_common_screen *)enc->screen;
+       struct si_screen *sscreen = (struct si_screen *)enc->screen;
        enc->task_info(enc, 0x00000000, 0, 0, 0);
 
        RVCE_BEGIN(0x01000001); // create cmd
        RVCE_CS(enc->enc_pic.ec.enc_use_circular_buffer);
-       RVCE_CS(profiles[enc->base.profile -
-               PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE]); // encProfile
+       RVCE_CS(u_get_h264_profile_idc(enc->base.profile)); // encProfile
        RVCE_CS(enc->base.level); // encLevel
        RVCE_CS(enc->enc_pic.ec.enc_pic_struct_restriction);
        RVCE_CS(enc->base.width); // encImageWidth
        RVCE_CS(enc->base.height); // encImageHeight
 
-       if (rscreen->chip_class < GFX9) {
+       if (sscreen->info.chip_class < GFX9) {
                RVCE_CS(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); // encRefPicLumaPitch
                RVCE_CS(enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); // encRefPicChromaPitch
                RVCE_CS(align(enc->luma->u.legacy.level[0].nblk_y, 16) / 8); // encRefYHeightInQw
@@ -200,7 +197,7 @@ static void create(struct rvce_encoder *enc)
 
 static void encode(struct rvce_encoder *enc)
 {
-       struct r600_common_screen *rscreen = (struct r600_common_screen *)enc->screen;
+       struct si_screen *sscreen = (struct si_screen *)enc->screen;
        signed luma_offset, chroma_offset, bs_offset;
        unsigned dep, bs_idx = enc->bs_idx++;
        int i;
@@ -250,7 +247,7 @@ static void encode(struct rvce_encoder *enc)
        RVCE_CS(enc->enc_pic.eo.end_of_sequence);
        RVCE_CS(enc->enc_pic.eo.end_of_stream);
 
-       if (rscreen->chip_class < GFX9) {
+       if (sscreen->info.chip_class < GFX9) {
                RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM,
                        enc->luma->u.legacy.level[0].offset); // inputPictureLumaAddressHi/Lo
                RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM,
@@ -458,14 +455,6 @@ static void config_extension(struct rvce_encoder *enc)
        RVCE_END();
 }
 
-static void destroy(struct rvce_encoder *enc)
-{
-       enc->task_info(enc, 0x00000001, 0, 0, 0);
-
-       RVCE_BEGIN(0x02000001); // destroy
-       RVCE_END();
-}
-
 static void feedback(struct rvce_encoder *enc)
 {
        RVCE_BEGIN(0x05000005); // feedback buffer
@@ -474,6 +463,16 @@ static void feedback(struct rvce_encoder *enc)
        RVCE_END();
 }
 
+static void destroy(struct rvce_encoder *enc)
+{
+       enc->task_info(enc, 0x00000001, 0, 0, 0);
+
+       feedback(enc);
+
+       RVCE_BEGIN(0x02000001); // destroy
+       RVCE_END();
+}
+
 static void motion_estimation(struct rvce_encoder *enc)
 {
        RVCE_BEGIN(0x04000007); // motion estimation