#define VP9_PROBS_TABLE_SIZE (RDECODE_VP9_PROBS_DATA_SIZE + 256)
#define RDECODE_SESSION_CONTEXT_SIZE (128 * 1024)
-#define RDECODE_GPCOM_VCPU_CMD 0x2070c
-#define RDECODE_GPCOM_VCPU_DATA0 0x20710
-#define RDECODE_GPCOM_VCPU_DATA1 0x20714
-#define RDECODE_ENGINE_CNTL 0x20718
+#define RDECODE_VCN1_GPCOM_VCPU_CMD 0x2070c
+#define RDECODE_VCN1_GPCOM_VCPU_DATA0 0x20710
+#define RDECODE_VCN1_GPCOM_VCPU_DATA1 0x20714
+#define RDECODE_VCN1_ENGINE_CNTL 0x20718
+
+#define RDECODE_VCN2_GPCOM_VCPU_CMD (0x503 << 2)
+#define RDECODE_VCN2_GPCOM_VCPU_DATA0 (0x504 << 2)
+#define RDECODE_VCN2_GPCOM_VCPU_DATA1 (0x505 << 2)
+#define RDECODE_VCN2_ENGINE_CNTL (0x506 << 2)
+
+#define RDECODE_VCN2_5_GPCOM_VCPU_CMD 0x3c
+#define RDECODE_VCN2_5_GPCOM_VCPU_DATA0 0x40
+#define RDECODE_VCN2_5_GPCOM_VCPU_DATA1 0x44
+#define RDECODE_VCN2_5_ENGINE_CNTL 0x9b4
-#define NUM_BUFFERS 4
#define NUM_MPEG2_REFS 6
#define NUM_H264_REFS 17
#define NUM_VC1_REFS 5
#define NUM_VP9_REFS 8
-struct radeon_decoder {
- struct pipe_video_codec base;
-
- unsigned stream_handle;
- unsigned stream_type;
- unsigned frame_number;
-
- struct pipe_screen *screen;
- struct radeon_winsys *ws;
- struct radeon_winsys_cs *cs;
-
- void *msg;
- uint32_t *fb;
- uint8_t *it;
- uint8_t *probs;
- void *bs_ptr;
-
- struct rvid_buffer msg_fb_it_probs_buffers[NUM_BUFFERS];
- struct rvid_buffer bs_buffers[NUM_BUFFERS];
- struct rvid_buffer dpb;
- struct rvid_buffer ctx;
- struct rvid_buffer sessionctx;
-
- unsigned bs_size;
- unsigned cur_buffer;
- void *render_pic_list[16];
- bool show_frame;
- unsigned ref_idx;
-};
-
static rvcn_dec_message_avc_t get_h264_msg(struct radeon_decoder *dec,
struct pipe_h264_picture_desc *pic)
{
memset(&result, 0, sizeof(result));
switch (pic->base.profile) {
case PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE:
+ case PIPE_VIDEO_PROFILE_MPEG4_AVC_CONSTRAINED_BASELINE:
result.profile = RDECODE_H264_PROFILE_BASELINE;
break;
}
if (pic->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10) {
- if (target->buffer_format == PIPE_FORMAT_P016) {
+ if (target->buffer_format == PIPE_FORMAT_P010 ||
+ target->buffer_format == PIPE_FORMAT_P016) {
result.p010_mode = 1;
result.msb_mode = 1;
} else {
assert(dec->base.max_references + 1 <= 16);
- for (i = 0 ; i < dec->base.max_references + 1 ; ++i) {
+ for (i = 0 ; i < 16 ; ++i) {
if (dec->render_pic_list[i] && dec->render_pic_list[i] == target) {
result.curr_pic_idx =
(uintptr_t)vl_video_buffer_get_associated_data(target, &dec->base);
result.ref_frame_sign_bias[2] = pic->picture_parameter.pic_fields.alt_ref_frame_sign_bias;
if (pic->base.profile == PIPE_VIDEO_PROFILE_VP9_PROFILE2) {
- if (target->buffer_format == PIPE_FORMAT_P016) {
+ if (target->buffer_format == PIPE_FORMAT_P010 ||
+ target->buffer_format == PIPE_FORMAT_P016) {
result.p010_mode = 1;
result.msb_mode = 1;
} else {
static unsigned calc_ctx_size_h265_main10(struct radeon_decoder *dec, struct pipe_h265_picture_desc *pic)
{
- unsigned block_size, log2_ctb_size, width_in_ctb, height_in_ctb, num_16x16_block_per_ctb;
+ unsigned log2_ctb_size, width_in_ctb, height_in_ctb, num_16x16_block_per_ctb;
unsigned context_buffer_size_per_ctb_row, cm_buffer_size, max_mb_address, db_left_tile_pxl_size;
unsigned db_left_tile_ctx_size = 4096 / 16 * (32 + 16 * 4);
else
max_references = MAX2(max_references, 17);
- block_size = (1 << (pic->pps->sps->log2_min_luma_coding_block_size_minus3 + 3));
- log2_ctb_size = block_size + pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
+ log2_ctb_size = pic->pps->sps->log2_min_luma_coding_block_size_minus3 + 3 +
+ pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
width_in_ctb = (width + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size;
height_in_ctb = (height + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size;
struct pipe_video_buffer *target,
struct pipe_picture_desc *picture)
{
- struct r600_texture *luma = (struct r600_texture *)
- ((struct vl_video_buffer *)target)->resources[0];
- struct r600_texture *chroma = (struct r600_texture *)
- ((struct vl_video_buffer *)target)->resources[1];
+ struct si_texture *luma = (struct si_texture *)
+ ((struct vl_video_buffer *)target)->resources[0];
+ struct si_texture *chroma = (struct si_texture *)
+ ((struct vl_video_buffer *)target)->resources[1];
rvcn_dec_message_header_t *header;
rvcn_dec_message_index_t *index;
rvcn_dec_message_decode_t *decode;
decode->bsd_size = align(dec->bs_size, 128);
decode->dpb_size = dec->dpb.res->buf->size;
decode->dt_size =
- r600_resource(((struct vl_video_buffer *)target)->resources[0])->buf->size +
- r600_resource(((struct vl_video_buffer *)target)->resources[1])->buf->size;
+ si_resource(((struct vl_video_buffer *)target)->resources[0])->buf->size +
+ si_resource(((struct vl_video_buffer *)target)->resources[1])->buf->size;
decode->sct_size = 0;
decode->sc_coeff_size = 0;
decode->sw_ctxt_size = RDECODE_SESSION_CONTEXT_SIZE;
- decode->db_pitch = align(dec->base.width, 32);
+ decode->db_pitch = (((struct si_screen*)dec->screen)->info.family >= CHIP_RENOIR &&
+ dec->base.width > 32 && dec->stream_type == RDECODE_CODEC_VP9) ?
+ align(dec->base.width, 64) :
+ align(dec->base.width, 32) ;
decode->db_surf_tile_config = 0;
decode->dt_pitch = luma->surface.u.gfx9.surf_pitch * luma->surface.blk_w;
/* default probability + probability data */
ctx_size = 2304 * 5;
- /* SRE collocated context data */
- ctx_size += 32 * 2 * 64 * 64;
-
- /* SMP collocated context data */
- ctx_size += 9 * 64 * 2 * 64 * 64;
-
- /* SDB left tile pixel */
- ctx_size += 8 * 2 * 4096;
+ if (((struct si_screen*)dec->screen)->info.family >= CHIP_RENOIR) {
+ /* SRE collocated context data */
+ ctx_size += 32 * 2 * 128 * 68;
+ /* SMP collocated context data */
+ ctx_size += 9 * 64 * 2 * 128 * 68;
+ /* SDB left tile pixel */
+ ctx_size += 8 * 2 * 2 * 8192;
+ } else {
+ ctx_size += 32 * 2 * 64 * 64;
+ ctx_size += 9 * 64 * 2 * 64 * 64;
+ ctx_size += 8 * 2 * 4096;
+ }
if (dec->base.profile == PIPE_VIDEO_PROFILE_VP9_PROFILE2)
ctx_size += 8 * 2 * 4096;
si_vid_clear_buffer(dec->base.context, &dec->ctx);
/* ctx needs probs table */
- ptr = dec->ws->buffer_map(dec->ctx.res->buf, dec->cs, PIPE_TRANSFER_WRITE);
+ ptr = dec->ws->buffer_map(
+ dec->ctx.res->buf, dec->cs,
+ PIPE_TRANSFER_WRITE | RADEON_TRANSFER_TEMPORARY);
fill_probs_table(ptr);
dec->ws->buffer_unmap(dec->ctx.res->buf);
}
if (dec->ctx.res)
decode->hw_ctxt_size = dec->ctx.res->buf->size;
- return luma->resource.buf;
+ return luma->buffer.buf;
}
static void rvcn_dec_message_destroy(struct radeon_decoder *dec)
uint64_t addr;
dec->ws->cs_add_buffer(dec->cs, buf, usage | RADEON_USAGE_SYNCHRONIZED,
- domain, RADEON_PRIO_UVD);
+ domain, 0);
addr = dec->ws->buffer_get_virtual_address(buf);
addr = addr + off;
- set_reg(dec, RDECODE_GPCOM_VCPU_DATA0, addr);
- set_reg(dec, RDECODE_GPCOM_VCPU_DATA1, addr >> 32);
- set_reg(dec, RDECODE_GPCOM_VCPU_CMD, cmd << 1);
+ set_reg(dec, dec->reg.data0, addr);
+ set_reg(dec, dec->reg.data1, addr >> 32);
+ set_reg(dec, dec->reg.cmd, cmd << 1);
}
/* do the codec needs an IT buffer ?*/
buf = &dec->msg_fb_it_probs_buffers[dec->cur_buffer];
/* and map it for CPU access */
- ptr = dec->ws->buffer_map(buf->res->buf, dec->cs, PIPE_TRANSFER_WRITE);
+ ptr = dec->ws->buffer_map(buf->res->buf, dec->cs,
+ PIPE_TRANSFER_WRITE | RADEON_TRANSFER_TEMPORARY);
/* calc buffer offsets */
dec->msg = ptr;
case PIPE_VIDEO_FORMAT_VP9:
max_references = MAX2(max_references, 9);
- dpb_size = (4096 * 3000 * 3 / 2) * max_references;
+ dpb_size = (((struct si_screen*)dec->screen)->info.family >= CHIP_RENOIR) ?
+ (8192 * 4320 * 3 / 2) * max_references :
+ (4096 * 3000 * 3 / 2) * max_references;
+
if (dec->base.profile == PIPE_VIDEO_PROFILE_VP9_PROFILE2)
dpb_size *= (3 / 2);
break;
+ case PIPE_VIDEO_FORMAT_JPEG:
+ dpb_size = 0;
+ break;
+
default:
// something is missing here
assert(0);
dec->bs_size = 0;
dec->bs_ptr = dec->ws->buffer_map(
dec->bs_buffers[dec->cur_buffer].res->buf,
- dec->cs, PIPE_TRANSFER_WRITE);
+ dec->cs, PIPE_TRANSFER_WRITE | RADEON_TRANSFER_TEMPORARY);
}
/**
return;
}
- dec->bs_ptr = dec->ws->buffer_map(buf->res->buf, dec->cs,
- PIPE_TRANSFER_WRITE);
+ dec->bs_ptr = dec->ws->buffer_map(
+ buf->res->buf, dec->cs,
+ PIPE_TRANSFER_WRITE | RADEON_TRANSFER_TEMPORARY);
if (!dec->bs_ptr)
return;
}
/**
- * end decoding of the current frame
+ * send cmd for vcn dec
*/
-static void radeon_dec_end_frame(struct pipe_video_codec *decoder,
+void send_cmd_dec(struct radeon_decoder *dec,
struct pipe_video_buffer *target,
struct pipe_picture_desc *picture)
{
- struct radeon_decoder *dec = (struct radeon_decoder*)decoder;
struct pb_buffer *dt;
struct rvid_buffer *msg_fb_it_probs_buf, *bs_buf;
- assert(decoder);
-
- if (!dec->bs_ptr)
- return;
-
msg_fb_it_probs_buf = &dec->msg_fb_it_probs_buffers[dec->cur_buffer];
bs_buf = &dec->bs_buffers[dec->cur_buffer];
else if (have_probs(dec))
send_cmd(dec, RDECODE_CMD_PROB_TBL_BUFFER, msg_fb_it_probs_buf->res->buf,
FB_BUFFER_OFFSET + FB_BUFFER_SIZE, RADEON_USAGE_READ, RADEON_DOMAIN_GTT);
- set_reg(dec, RDECODE_ENGINE_CNTL, 1);
+ set_reg(dec, dec->reg.cntl, 1);
+}
+/**
+ * end decoding of the current frame
+ */
+static void radeon_dec_end_frame(struct pipe_video_codec *decoder,
+ struct pipe_video_buffer *target,
+ struct pipe_picture_desc *picture)
+{
+ struct radeon_decoder *dec = (struct radeon_decoder*)decoder;
+
+ assert(decoder);
+
+ if (!dec->bs_ptr)
+ return;
+
+ dec->send_cmd(dec, target, picture);
flush(dec, PIPE_FLUSH_ASYNC);
next_buffer(dec);
}
struct si_context *sctx = (struct si_context*)context;
struct radeon_winsys *ws = sctx->ws;
unsigned width = templ->width, height = templ->height;
- unsigned dpb_size, bs_buf_size, stream_type = 0;
+ unsigned dpb_size, bs_buf_size, stream_type = 0, ring = RING_VCN_DEC;
struct radeon_decoder *dec;
int r, i;
case PIPE_VIDEO_FORMAT_VP9:
stream_type = RDECODE_CODEC_VP9;
break;
+ case PIPE_VIDEO_FORMAT_JPEG:
+ stream_type = RDECODE_CODEC_JPEG;
+ ring = RING_VCN_JPEG;
+ break;
default:
assert(0);
break;
dec->stream_handle = si_vid_alloc_stream_handle();
dec->screen = context->screen;
dec->ws = ws;
- dec->cs = ws->cs_create(sctx->ctx, RING_VCN_DEC, NULL, NULL);
+ dec->cs = ws->cs_create(sctx->ctx, ring, NULL, NULL, false);
if (!dec->cs) {
RVID_ERR("Can't get command submission context.\n");
goto error;
void *ptr;
buf = &dec->msg_fb_it_probs_buffers[i];
- ptr = dec->ws->buffer_map(buf->res->buf, dec->cs, PIPE_TRANSFER_WRITE);
+ ptr = dec->ws->buffer_map(
+ buf->res->buf, dec->cs,
+ PIPE_TRANSFER_WRITE | RADEON_TRANSFER_TEMPORARY);
ptr += FB_BUFFER_OFFSET + FB_BUFFER_SIZE;
fill_probs_table(ptr);
dec->ws->buffer_unmap(buf->res->buf);
}
dpb_size = calc_dpb_size(dec);
-
- if (!si_vid_create_buffer(dec->screen, &dec->dpb, dpb_size, PIPE_USAGE_DEFAULT)) {
- RVID_ERR("Can't allocated dpb.\n");
- goto error;
+ if (dpb_size) {
+ if (!si_vid_create_buffer(dec->screen, &dec->dpb, dpb_size, PIPE_USAGE_DEFAULT)) {
+ RVID_ERR("Can't allocated dpb.\n");
+ goto error;
+ }
+ si_vid_clear_buffer(context, &dec->dpb);
}
- si_vid_clear_buffer(context, &dec->dpb);
-
if (dec->stream_type == RDECODE_CODEC_H264_PERF) {
unsigned ctx_size = calc_ctx_size_h264_perf(dec);
if (!si_vid_create_buffer(dec->screen, &dec->ctx, ctx_size, PIPE_USAGE_DEFAULT)) {
}
si_vid_clear_buffer(context, &dec->sessionctx);
+ if (sctx->family == CHIP_ARCTURUS) {
+ dec->reg.data0 = RDECODE_VCN2_5_GPCOM_VCPU_DATA0;
+ dec->reg.data1 = RDECODE_VCN2_5_GPCOM_VCPU_DATA1;
+ dec->reg.cmd = RDECODE_VCN2_5_GPCOM_VCPU_CMD;
+ dec->reg.cntl = RDECODE_VCN2_5_ENGINE_CNTL;
+ dec->jpg.direct_reg = true;
+ } else if (sctx->family >= CHIP_NAVI10 || sctx->family == CHIP_RENOIR) {
+ dec->reg.data0 = RDECODE_VCN2_GPCOM_VCPU_DATA0;
+ dec->reg.data1 = RDECODE_VCN2_GPCOM_VCPU_DATA1;
+ dec->reg.cmd = RDECODE_VCN2_GPCOM_VCPU_CMD;
+ dec->reg.cntl = RDECODE_VCN2_ENGINE_CNTL;
+ dec->jpg.direct_reg = true;
+ } else {
+ dec->reg.data0 = RDECODE_VCN1_GPCOM_VCPU_DATA0;
+ dec->reg.data1 = RDECODE_VCN1_GPCOM_VCPU_DATA1;
+ dec->reg.cmd = RDECODE_VCN1_GPCOM_VCPU_CMD;
+ dec->reg.cntl = RDECODE_VCN1_ENGINE_CNTL;
+ dec->jpg.direct_reg = false;
+ }
+
map_msg_fb_it_probs_buf(dec);
rvcn_dec_message_create(dec);
send_msg_buf(dec);
next_buffer(dec);
+ if (stream_type == RDECODE_CODEC_JPEG)
+ dec->send_cmd = send_cmd_jpeg;
+ else
+ dec->send_cmd = send_cmd_dec;
+
return &dec->base;
error:
projects / mesa.git / blobdiff