freedreno: proper locking for iterating dependent batches
[mesa.git] / src / gallium / drivers / radeonsi / cik_sdma.c
index 8154d720dc24736e110201c42d175b42a5074bfb..3e3b9cd4329f344b5f2bac472eee4b484d5552ca 100644 (file)
@@ -20,9 +20,6 @@
  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  * USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- *      Jerome Glisse
  */
 
 #include "sid.h"
@@ -50,7 +47,7 @@ static void cik_sdma_copy_buffer(struct si_context *ctx,
        src_offset += rsrc->gpu_address;
 
        ncopy = DIV_ROUND_UP(size, CIK_SDMA_COPY_MAX_SIZE);
-       r600_need_dma_space(&ctx->b, ncopy * 7, rdst, rsrc);
+       si_need_dma_space(&ctx->b, ncopy * 7, rdst, rsrc);
 
        for (i = 0; i < ncopy; i++) {
                csize = MIN2(size, CIK_SDMA_COPY_MAX_SIZE);
@@ -95,7 +92,7 @@ static void cik_sdma_clear_buffer(struct pipe_context *ctx,
 
        /* the same maximum size as for copying */
        ncopy = DIV_ROUND_UP(size, CIK_SDMA_COPY_MAX_SIZE);
-       r600_need_dma_space(&sctx->b, ncopy * 5, rdst, NULL);
+       si_need_dma_space(&sctx->b, ncopy * 5, rdst, NULL);
 
        for (i = 0; i < ncopy; i++) {
                csize = MIN2(size, CIK_SDMA_COPY_MAX_SIZE);
@@ -120,7 +117,7 @@ static unsigned encode_tile_info(struct si_context *sctx,
                                 struct r600_texture *tex, unsigned level,
                                 bool set_bpp)
 {
-       struct radeon_info *info = &sctx->screen->b.info;
+       struct radeon_info *info = &sctx->screen->info;
        unsigned tile_index = tex->surface.u.legacy.tiling_index[level];
        unsigned macro_tile_index = tex->surface.u.legacy.macro_tile_index;
        unsigned tile_mode = info->si_tile_mode_array[tile_index];
@@ -146,7 +143,7 @@ static bool cik_sdma_copy_texture(struct si_context *sctx,
                                  unsigned src_level,
                                  const struct pipe_box *src_box)
 {
-       struct radeon_info *info = &sctx->screen->b.info;
+       struct radeon_info *info = &sctx->screen->info;
        struct r600_texture *rsrc = (struct r600_texture*)src;
        struct r600_texture *rdst = (struct r600_texture*)dst;
        unsigned bpp = rdst->surface.bpe;
@@ -168,8 +165,8 @@ static bool cik_sdma_copy_texture(struct si_context *sctx,
                                            rsrc->surface.tile_swizzle : 0;
        unsigned dst_pitch = rdst->surface.u.legacy.level[dst_level].nblk_x;
        unsigned src_pitch = rsrc->surface.u.legacy.level[src_level].nblk_x;
-       uint64_t dst_slice_pitch = rdst->surface.u.legacy.level[dst_level].slice_size / bpp;
-       uint64_t src_slice_pitch = rsrc->surface.u.legacy.level[src_level].slice_size / bpp;
+       uint64_t dst_slice_pitch = ((uint64_t)rdst->surface.u.legacy.level[dst_level].slice_size_dw * 4) / bpp;
+       uint64_t src_slice_pitch = ((uint64_t)rsrc->surface.u.legacy.level[src_level].slice_size_dw * 4) / bpp;
        unsigned dst_width = minify_as_blocks(rdst->resource.b.b.width0,
                                              dst_level, rdst->surface.blk_w);
        unsigned src_width = minify_as_blocks(rsrc->resource.b.b.width0,
@@ -194,7 +191,7 @@ static bool cik_sdma_copy_texture(struct si_context *sctx,
               src_slice_pitch * bpp * (srcz + src_box->depth) <=
               rsrc->resource.buf->size);
 
-       if (!r600_prepare_for_dma_blit(&sctx->b, rdst, dst_level, dstx, dsty,
+       if (!si_prepare_for_dma_blit(&sctx->b, rdst, dst_level, dstx, dsty,
                                        dstz, rsrc, src_level, src_box))
                return false;
 
@@ -235,7 +232,7 @@ static bool cik_sdma_copy_texture(struct si_context *sctx,
              srcy + copy_height != (1 << 14)))) {
                struct radeon_winsys_cs *cs = sctx->b.dma.cs;
 
-               r600_need_dma_space(&sctx->b, 13, &rdst->resource, &rsrc->resource);
+               si_need_dma_space(&sctx->b, 13, &rdst->resource, &rsrc->resource);
 
                radeon_emit(cs, CIK_SDMA_PACKET(CIK_SDMA_OPCODE_COPY,
                                                CIK_SDMA_COPY_SUB_OPCODE_LINEAR_SUB_WINDOW, 0) |
@@ -398,7 +395,7 @@ static bool cik_sdma_copy_texture(struct si_context *sctx,
                        struct radeon_winsys_cs *cs = sctx->b.dma.cs;
                        uint32_t direction = linear == rdst ? 1u << 31 : 0;
 
-                       r600_need_dma_space(&sctx->b, 14, &rdst->resource, &rsrc->resource);
+                       si_need_dma_space(&sctx->b, 14, &rdst->resource, &rsrc->resource);
 
                        radeon_emit(cs, CIK_SDMA_PACKET(CIK_SDMA_OPCODE_COPY,
                                                        CIK_SDMA_COPY_SUB_OPCODE_TILED_SUB_WINDOW, 0) |
@@ -492,7 +489,7 @@ static bool cik_sdma_copy_texture(struct si_context *sctx,
                      dstx + copy_width != (1 << 14)))) {
                        struct radeon_winsys_cs *cs = sctx->b.dma.cs;
 
-                       r600_need_dma_space(&sctx->b, 15, &rdst->resource, &rsrc->resource);
+                       si_need_dma_space(&sctx->b, 15, &rdst->resource, &rsrc->resource);
 
                        radeon_emit(cs, CIK_SDMA_PACKET(CIK_SDMA_OPCODE_COPY,
                                                        CIK_SDMA_COPY_SUB_OPCODE_T2T_SUB_WINDOW, 0));