radeonsi: Set PIPE_SHADER_CAP_MAX_SHADER_IMAGES

[mesa.git] / src / gallium / drivers / radeonsi / cik_sdma.c

diff --git a/src/gallium/drivers/radeonsi/cik_sdma.c b/src/gallium/drivers/radeonsi/cik_sdma.c
index e53af1dd6b50f7698f6a9659ff7ed319262fadab..6eb62dcc8903195e53e66597e7bfc6cb13d0951a 100644 (file)
--- a/src/gallium/drivers/radeonsi/cik_sdma.c
+++ b/src/gallium/drivers/radeonsi/cik_sdma.c
@@ -50,7 +50,7 @@ static void cik_sdma_do_copy_buffer(struct si_context *ctx,
                                    uint64_t src_offset,
                                    uint64_t size)
 {
-       struct radeon_winsys_cs *cs = ctx->b.rings.dma.cs;
+       struct radeon_winsys_cs *cs = ctx->b.dma.cs;
        unsigned i, ncopy, csize;
        struct r600_resource *rdst = (struct r600_resource*)dst;
        struct r600_resource *rsrc = (struct r600_resource*)src;
@@ -61,9 +61,9 @@ static void cik_sdma_do_copy_buffer(struct si_context *ctx,
        ncopy = (size + CIK_SDMA_COPY_MAX_SIZE - 1) / CIK_SDMA_COPY_MAX_SIZE;
        r600_need_dma_space(&ctx->b, ncopy * 7);
 
-       radeon_add_to_buffer_list(&ctx->b, &ctx->b.rings.dma, rsrc, RADEON_USAGE_READ,
+       radeon_add_to_buffer_list(&ctx->b, &ctx->b.dma, rsrc, RADEON_USAGE_READ,
                              RADEON_PRIO_SDMA_BUFFER);
-       radeon_add_to_buffer_list(&ctx->b, &ctx->b.rings.dma, rdst, RADEON_USAGE_WRITE,
+       radeon_add_to_buffer_list(&ctx->b, &ctx->b.dma, rdst, RADEON_USAGE_WRITE,
                              RADEON_PRIO_SDMA_BUFFER);
 
        for (i = 0; i < ncopy; i++) {
@@ -112,7 +112,7 @@ static void cik_sdma_copy_tile(struct si_context *ctx,
                               unsigned pitch,
                               unsigned bpe)
 {
-       struct radeon_winsys_cs *cs = ctx->b.rings.dma.cs;
+       struct radeon_winsys_cs *cs = ctx->b.dma.cs;
        struct si_screen *sscreen = ctx->screen;
        struct r600_texture *rsrc = (struct r600_texture*)src;
        struct r600_texture *rdst = (struct r600_texture*)dst;
@@ -171,9 +171,9 @@ static void cik_sdma_copy_tile(struct si_context *ctx,
        ncopy = (copy_height + cheight - 1) / cheight;
        r600_need_dma_space(&ctx->b, ncopy * 12);
 
-       radeon_add_to_buffer_list(&ctx->b, &ctx->b.rings.dma, &rsrc->resource,
+       radeon_add_to_buffer_list(&ctx->b, &ctx->b.dma, &rsrc->resource,
                              RADEON_USAGE_READ, RADEON_PRIO_SDMA_TEXTURE);
-       radeon_add_to_buffer_list(&ctx->b, &ctx->b.rings.dma, &rdst->resource,
+       radeon_add_to_buffer_list(&ctx->b, &ctx->b.dma, &rdst->resource,
                              RADEON_USAGE_WRITE, RADEON_PRIO_SDMA_TEXTURE);
 
        copy_height = size * 4 / pitch;
@@ -196,7 +196,7 @@ static void cik_sdma_copy_tile(struct si_context *ctx,
                        (tile_split << 11) | (mt << 8) | (array_mode << 3) |
                        lbpe;
                cs->buf[cs->cdw++] = y << 16; /* | x */
-               cs->buf[cs->cdw++] = 0; /* z */;
+               cs->buf[cs->cdw++] = 0; /* z */
                cs->buf[cs->cdw++] = addr & 0xfffffffc;
                cs->buf[cs->cdw++] = addr >> 32;
                cs->buf[cs->cdw++] = (pitch / bpe) - 1;
@@ -224,7 +224,7 @@ void cik_sdma_copy(struct pipe_context *ctx,
        unsigned copy_height, y_align;
        unsigned dst_x = dstx, dst_y = dsty, dst_z = dstz;
 
-       if (sctx->b.rings.dma.cs == NULL) {
+       if (sctx->b.dma.cs == NULL) {
                goto fallback;
        }
 
@@ -243,7 +243,7 @@ void cik_sdma_copy(struct pipe_context *ctx,
        if (src->format != dst->format ||
            rdst->surface.nsamples > 1 || rsrc->surface.nsamples > 1 ||
            (rdst->dirty_level_mask | rdst->stencil_dirty_level_mask) & (1 << dst_level) ||
-           rdst->dcc_buffer || rsrc->dcc_buffer) {
+           rdst->dcc_offset || rsrc->dcc_offset) {
                goto fallback;
        }
 
@@ -308,7 +308,7 @@ void cik_sdma_copy(struct pipe_context *ctx,
                        }
 
                        mtilew = (8 * rsrc->surface.bankw *
-                                 sctx->screen->b.tiling_info.num_channels) *
+                                 sctx->screen->b.info.num_tile_pipes) *
                                rsrc->surface.mtilea;
                        assert(!(mtilew & (mtilew - 1)));
                        mtileh = (8 * rsrc->surface.bankh * num_banks) /