#include "util/u_blitter.h"
#include "util/u_double_list.h"
#include "util/u_format.h"
-#include "util/u_format_s3tc.h"
#include "util/u_transfer.h"
#include "util/u_surface.h"
#include "util/u_pack_color.h"
#include "vl/vl_video_buffer.h"
#include "os/os_time.h"
#include "pipebuffer/pb_buffer.h"
+#include "radeonsi_pipe.h"
+#include "radeon/radeon_uvd.h"
#include "r600.h"
#include "sid.h"
#include "r600_resource.h"
#include "radeonsi_pipe.h"
-#include "r600_hw_context_priv.h"
#include "si_state.h"
+#include "../radeon/r600_cs.h"
/*
* pipe_context
*/
-static struct r600_fence *r600_create_fence(struct r600_context *rctx)
-{
- struct r600_screen *rscreen = rctx->screen;
- struct r600_fence *fence = NULL;
-
- pipe_mutex_lock(rscreen->fences.mutex);
-
- if (!rscreen->fences.bo) {
- /* Create the shared buffer object */
- rscreen->fences.bo = si_resource_create_custom(&rscreen->screen,
- PIPE_USAGE_STAGING,
- 4096);
- if (!rscreen->fences.bo) {
- R600_ERR("r600: failed to create bo for fence objects\n");
- goto out;
- }
- rscreen->fences.data = rctx->ws->buffer_map(rscreen->fences.bo->cs_buf,
- rctx->cs,
- PIPE_TRANSFER_READ_WRITE);
- }
-
- if (!LIST_IS_EMPTY(&rscreen->fences.pool)) {
- struct r600_fence *entry;
-
- /* Try to find a freed fence that has been signalled */
- LIST_FOR_EACH_ENTRY(entry, &rscreen->fences.pool, head) {
- if (rscreen->fences.data[entry->index] != 0) {
- LIST_DELINIT(&entry->head);
- fence = entry;
- break;
- }
- }
- }
-
- if (!fence) {
- /* Allocate a new fence */
- struct r600_fence_block *block;
- unsigned index;
-
- if ((rscreen->fences.next_index + 1) >= 1024) {
- R600_ERR("r600: too many concurrent fences\n");
- goto out;
- }
-
- index = rscreen->fences.next_index++;
-
- if (!(index % FENCE_BLOCK_SIZE)) {
- /* Allocate a new block */
- block = CALLOC_STRUCT(r600_fence_block);
- if (block == NULL)
- goto out;
-
- LIST_ADD(&block->head, &rscreen->fences.blocks);
- } else {
- block = LIST_ENTRY(struct r600_fence_block, rscreen->fences.blocks.next, head);
- }
-
- fence = &block->fences[index % FENCE_BLOCK_SIZE];
- fence->index = index;
- }
-
- pipe_reference_init(&fence->reference, 1);
-
- rscreen->fences.data[fence->index] = 0;
- si_context_emit_fence(rctx, rscreen->fences.bo, fence->index, 1);
-
- /* Create a dummy BO so that fence_finish without a timeout can sleep waiting for completion */
- fence->sleep_bo = si_resource_create_custom(&rctx->screen->screen, PIPE_USAGE_STAGING, 1);
-
- /* Add the fence as a dummy relocation. */
- r600_context_bo_reloc(rctx, fence->sleep_bo, RADEON_USAGE_READWRITE);
-
-out:
- pipe_mutex_unlock(rscreen->fences.mutex);
- return fence;
-}
-
-
void radeonsi_flush(struct pipe_context *ctx, struct pipe_fence_handle **fence,
unsigned flags)
{
struct r600_context *rctx = (struct r600_context *)ctx;
- struct r600_fence **rfence = (struct r600_fence**)fence;
struct pipe_query *render_cond = NULL;
+ boolean render_cond_cond = FALSE;
unsigned render_cond_mode = 0;
- if (rfence)
- *rfence = r600_create_fence(rctx);
+ if (fence) {
+ *fence = rctx->b.ws->cs_create_fence(rctx->b.rings.gfx.cs);
+ }
/* Disable render condition. */
if (rctx->current_render_cond) {
render_cond = rctx->current_render_cond;
+ render_cond_cond = rctx->current_render_cond_cond;
render_cond_mode = rctx->current_render_cond_mode;
- ctx->render_condition(ctx, NULL, 0);
+ ctx->render_condition(ctx, NULL, FALSE, 0);
}
si_context_flush(rctx, flags);
/* Re-enable render condition. */
if (render_cond) {
- ctx->render_condition(ctx, render_cond, render_cond_mode);
+ ctx->render_condition(ctx, render_cond, render_cond_cond, render_cond_mode);
}
}
static void r600_flush_from_st(struct pipe_context *ctx,
struct pipe_fence_handle **fence,
- enum pipe_flush_flags flags)
+ unsigned flags)
{
radeonsi_flush(ctx, fence,
flags & PIPE_FLUSH_END_OF_FRAME ? RADEON_FLUSH_END_OF_FRAME : 0);
{
struct r600_context *rctx = (struct r600_context *)context;
- si_resource_reference(&rctx->border_color_table, NULL);
+ si_release_all_descriptors(rctx);
+
+ pipe_resource_reference(&rctx->null_const_buf.buffer, NULL);
+ r600_resource_reference(&rctx->border_color_table, NULL);
if (rctx->dummy_pixel_shader) {
- rctx->context.delete_fs_state(&rctx->context, rctx->dummy_pixel_shader);
+ rctx->b.b.delete_fs_state(&rctx->b.b, rctx->dummy_pixel_shader);
}
- rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush_depth_stencil);
- rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush_depth);
- rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush_stencil);
- rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush_inplace);
+ for (int i = 0; i < 8; i++) {
+ rctx->b.b.delete_depth_stencil_alpha_state(&rctx->b.b, rctx->custom_dsa_flush_depth_stencil[i]);
+ rctx->b.b.delete_depth_stencil_alpha_state(&rctx->b.b, rctx->custom_dsa_flush_depth[i]);
+ rctx->b.b.delete_depth_stencil_alpha_state(&rctx->b.b, rctx->custom_dsa_flush_stencil[i]);
+ }
+ rctx->b.b.delete_depth_stencil_alpha_state(&rctx->b.b, rctx->custom_dsa_flush_inplace);
+ rctx->b.b.delete_blend_state(&rctx->b.b, rctx->custom_blend_resolve);
+ rctx->b.b.delete_blend_state(&rctx->b.b, rctx->custom_blend_decompress);
util_unreference_framebuffer_state(&rctx->framebuffer);
util_blitter_destroy(rctx->blitter);
u_upload_destroy(rctx->uploader);
}
util_slab_destroy(&rctx->pool_transfers);
+
+ r600_common_context_cleanup(&rctx->b);
FREE(rctx);
}
{
struct r600_context *rctx = CALLOC_STRUCT(r600_context);
struct r600_screen* rscreen = (struct r600_screen *)screen;
+ int shader, i;
if (rctx == NULL)
return NULL;
- rctx->context.screen = screen;
- rctx->context.priv = priv;
- rctx->context.destroy = r600_destroy_context;
- rctx->context.flush = r600_flush_from_st;
+ if (!r600_common_context_init(&rctx->b, &rscreen->b))
+ goto fail;
+
+ rctx->b.b.screen = screen;
+ rctx->b.b.priv = priv;
+ rctx->b.b.destroy = r600_destroy_context;
+ rctx->b.b.flush = r600_flush_from_st;
/* Easy accessing of screen/winsys. */
rctx->screen = rscreen;
- rctx->ws = rscreen->ws;
- rctx->family = rscreen->family;
- rctx->chip_class = rscreen->chip_class;
si_init_blit_functions(rctx);
r600_init_query_functions(rctx);
r600_init_context_resource_functions(rctx);
- si_init_surface_functions(rctx);
+ si_init_compute_functions(rctx);
+
+ if (rscreen->b.info.has_uvd) {
+ rctx->b.b.create_video_codec = radeonsi_uvd_create_decoder;
+ rctx->b.b.create_video_buffer = radeonsi_video_buffer_create;
+ } else {
+ rctx->b.b.create_video_codec = vl_create_decoder;
+ rctx->b.b.create_video_buffer = vl_video_buffer_create;
+ }
+
+ rctx->b.rings.gfx.cs = rctx->b.ws->cs_create(rctx->b.ws, RING_GFX, NULL);
+ rctx->b.rings.gfx.flush = r600_flush_from_winsys;
- rctx->context.create_video_decoder = vl_create_decoder;
- rctx->context.create_video_buffer = vl_video_buffer_create;
+ si_init_all_descriptors(rctx);
- switch (rctx->chip_class) {
- case TAHITI:
+ /* Initialize cache_flush. */
+ rctx->cache_flush = si_atom_cache_flush;
+ rctx->atoms.cache_flush = &rctx->cache_flush;
+
+ rctx->atoms.streamout_begin = &rctx->b.streamout.begin_atom;
+
+ switch (rctx->b.chip_class) {
+ case SI:
+ case CIK:
si_init_state_functions(rctx);
- LIST_INITHEAD(&rctx->active_query_list);
- rctx->cs = rctx->ws->cs_create(rctx->ws, RING_GFX);
+ LIST_INITHEAD(&rctx->active_nontimer_query_list);
rctx->max_db = 8;
si_init_config(rctx);
break;
default:
- R600_ERR("Unsupported chip class %d.\n", rctx->chip_class);
- r600_destroy_context(&rctx->context);
- return NULL;
+ R600_ERR("Unsupported chip class %d.\n", rctx->b.chip_class);
+ goto fail;
}
- rctx->ws->cs_set_flush_callback(rctx->cs, r600_flush_from_winsys, rctx);
+ rctx->b.ws->cs_set_flush_callback(rctx->b.rings.gfx.cs, r600_flush_from_winsys, rctx);
util_slab_create(&rctx->pool_transfers,
sizeof(struct pipe_transfer), 64,
UTIL_SLAB_SINGLETHREADED);
- rctx->uploader = u_upload_create(&rctx->context, 1024 * 1024, 256,
+ rctx->uploader = u_upload_create(&rctx->b.b, 1024 * 1024, 256,
PIPE_BIND_INDEX_BUFFER |
PIPE_BIND_CONSTANT_BUFFER);
- if (!rctx->uploader) {
- r600_destroy_context(&rctx->context);
- return NULL;
- }
+ if (!rctx->uploader)
+ goto fail;
- rctx->blitter = util_blitter_create(&rctx->context);
- if (rctx->blitter == NULL) {
- r600_destroy_context(&rctx->context);
- return NULL;
- }
-
- si_get_backend_mask(rctx); /* this emits commands and must be last */
+ rctx->blitter = util_blitter_create(&rctx->b.b);
+ if (rctx->blitter == NULL)
+ goto fail;
rctx->dummy_pixel_shader =
- util_make_fragment_cloneinput_shader(&rctx->context, 0,
+ util_make_fragment_cloneinput_shader(&rctx->b.b, 0,
TGSI_SEMANTIC_GENERIC,
TGSI_INTERPOLATE_CONSTANT);
- rctx->context.bind_fs_state(&rctx->context, rctx->dummy_pixel_shader);
+ rctx->b.b.bind_fs_state(&rctx->b.b, rctx->dummy_pixel_shader);
+
+ /* these must be last */
+ si_begin_new_cs(rctx);
+ si_get_backend_mask(rctx);
+
+ /* CIK cannot unbind a constant buffer (S_BUFFER_LOAD is buggy
+ * with a NULL buffer). We need to use a dummy buffer instead. */
+ if (rctx->b.chip_class == CIK) {
+ rctx->null_const_buf.buffer = pipe_buffer_create(screen, PIPE_BIND_CONSTANT_BUFFER,
+ PIPE_USAGE_STATIC, 16);
+ rctx->null_const_buf.buffer_size = rctx->null_const_buf.buffer->width0;
+
+ for (shader = 0; shader < SI_NUM_SHADERS; shader++) {
+ for (i = 0; i < NUM_CONST_BUFFERS; i++) {
+ rctx->b.b.set_constant_buffer(&rctx->b.b, shader, i,
+ &rctx->null_const_buf);
+ }
+ }
- return &rctx->context;
+ /* Clear the NULL constant buffer, because loads should return zeros. */
+ rctx->b.clear_buffer(&rctx->b.b, rctx->null_const_buf.buffer, 0,
+ rctx->null_const_buf.buffer->width0, 0);
+ }
+
+ return &rctx->b.b;
+fail:
+ r600_destroy_context(&rctx->b.b);
+ return NULL;
}
/*
return "X.Org";
}
+const char *r600_get_llvm_processor_name(enum radeon_family family)
+{
+ switch (family) {
+ case CHIP_TAHITI: return "tahiti";
+ case CHIP_PITCAIRN: return "pitcairn";
+ case CHIP_VERDE: return "verde";
+ case CHIP_OLAND: return "oland";
+#if HAVE_LLVM <= 0x0303
+ default: return "SI";
+#else
+ case CHIP_HAINAN: return "hainan";
+ case CHIP_BONAIRE: return "bonaire";
+ case CHIP_KABINI: return "kabini";
+ case CHIP_KAVERI: return "kaveri";
+ case CHIP_HAWAII: return "hawaii";
+ default: return "";
+#endif
+ }
+}
+
static const char *r600_get_family_name(enum radeon_family family)
{
switch(family) {
case CHIP_PITCAIRN: return "AMD PITCAIRN";
case CHIP_VERDE: return "AMD CAPE VERDE";
case CHIP_OLAND: return "AMD OLAND";
+ case CHIP_HAINAN: return "AMD HAINAN";
+ case CHIP_BONAIRE: return "AMD BONAIRE";
+ case CHIP_KAVERI: return "AMD KAVERI";
+ case CHIP_KABINI: return "AMD KABINI";
+ case CHIP_HAWAII: return "AMD HAWAII";
default: return "AMD unknown";
}
}
{
struct r600_screen *rscreen = (struct r600_screen *)pscreen;
- return r600_get_family_name(rscreen->family);
+ return r600_get_family_name(rscreen->b.family);
}
static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
{
struct r600_screen *rscreen = (struct r600_screen *)pscreen;
+ bool has_streamout = HAVE_LLVM >= 0x0304;
switch (param) {
/* Supported features (boolean caps). */
case PIPE_CAP_USER_CONSTANT_BUFFERS:
case PIPE_CAP_START_INSTANCE:
case PIPE_CAP_NPOT_TEXTURES:
+ case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
+ case PIPE_CAP_TGSI_INSTANCEID:
+ case PIPE_CAP_COMPUTE:
+ case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
return 1;
+
+ case PIPE_CAP_TEXTURE_MULTISAMPLE:
+ /* 2D tiling on CIK is supported since DRM 2.35.0 */
+ return HAVE_LLVM >= 0x0304 && (rscreen->b.chip_class < CIK ||
+ rscreen->b.info.drm_minor >= 35);
+
case PIPE_CAP_TGSI_TEXCOORD:
return 0;
return 256;
case PIPE_CAP_GLSL_FEATURE_LEVEL:
- return debug_get_bool_option("R600_GLSL130", FALSE) ? 130 : 120;
+ return 140;
+
+ case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
+ return 1;
+ case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
+ return MIN2(rscreen->b.info.vram_size, 0xFFFFFFFF);
/* Unsupported features. */
- case PIPE_CAP_TGSI_INSTANCEID:
case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
case PIPE_CAP_SCALED_RESOLVE:
- case PIPE_CAP_TGSI_CAN_COMPACT_VARYINGS:
case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
case PIPE_CAP_VERTEX_COLOR_CLAMPED:
case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
case PIPE_CAP_USER_VERTEX_BUFFERS:
- case PIPE_CAP_TEXTURE_MULTISAMPLE:
- case PIPE_CAP_COMPUTE:
- case PIPE_CAP_QUERY_TIMESTAMP:
+ case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
case PIPE_CAP_CUBE_MAP_ARRAY:
- case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
- case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
return 0;
+ case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
+ return PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_R600;
+
/* Stream output. */
-#if 0
case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
- return debug_get_bool_option("R600_STREAMOUT", FALSE) ? 4 : 0;
+ return has_streamout ? 4 : 0;
case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
- return debug_get_bool_option("R600_STREAMOUT", FALSE) ? 1 : 0;
+ return has_streamout ? 1 : 0;
case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
- return 16*4;
-#endif
- case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
- case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
- case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
- case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
- return 0;
+ return has_streamout ? 32*4 : 0;
/* Texturing. */
case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
/* FIXME some r6xx are buggy and can only do 4 */
return 8;
+ case PIPE_CAP_MAX_VIEWPORTS:
+ return 1;
+
/* Timer queries, present when the clock frequency is non zero. */
+ case PIPE_CAP_QUERY_TIMESTAMP:
case PIPE_CAP_QUERY_TIME_ELAPSED:
- return rscreen->info.r600_clock_crystal_freq != 0;
+ return rscreen->b.info.r600_clock_crystal_freq != 0;
case PIPE_CAP_MIN_TEXEL_OFFSET:
return -8;
case PIPE_CAP_MAX_TEXEL_OFFSET:
return 7;
+ case PIPE_CAP_ENDIANNESS:
+ return PIPE_ENDIAN_LITTLE;
}
return 0;
}
case PIPE_SHADER_GEOMETRY:
/* TODO: support and enable geometry programs */
return 0;
+ case PIPE_SHADER_COMPUTE:
+ switch (param) {
+ case PIPE_SHADER_CAP_PREFERRED_IR:
+ return PIPE_SHADER_IR_LLVM;
+ default:
+ return 0;
+ }
default:
/* TODO: support tessellation */
return 0;
case PIPE_SHADER_CAP_MAX_CONSTS:
return 4096; /* actually only memory limits this */
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
- return 1;
+ return NUM_PIPE_CONST_BUFFERS;
case PIPE_SHADER_CAP_MAX_PREDS:
return 0; /* FIXME */
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
case PIPE_SHADER_CAP_SUBROUTINES:
return 0;
case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
+ case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
return 16;
case PIPE_SHADER_CAP_PREFERRED_IR:
return PIPE_SHADER_IR_TGSI;
static int r600_get_video_param(struct pipe_screen *screen,
enum pipe_video_profile profile,
+ enum pipe_video_entrypoint entrypoint,
enum pipe_video_cap param)
{
switch (param) {
case PIPE_VIDEO_CAP_SUPPORTED:
- return vl_profile_supported(screen, profile);
+ return vl_profile_supported(screen, profile, entrypoint);
case PIPE_VIDEO_CAP_NPOT_TEXTURES:
return 1;
case PIPE_VIDEO_CAP_MAX_WIDTH:
return vl_video_buffer_max_size(screen);
case PIPE_VIDEO_CAP_PREFERED_FORMAT:
return PIPE_FORMAT_NV12;
+ case PIPE_VIDEO_CAP_MAX_LEVEL:
+ return vl_level_supported(screen, profile);
default:
return 0;
}
}
-static void r600_destroy_screen(struct pipe_screen* pscreen)
+static int r600_get_compute_param(struct pipe_screen *screen,
+ enum pipe_compute_cap param,
+ void *ret)
{
- struct r600_screen *rscreen = (struct r600_screen *)pscreen;
-
- if (rscreen == NULL)
- return;
-
- if (rscreen->fences.bo) {
- struct r600_fence_block *entry, *tmp;
-
- LIST_FOR_EACH_ENTRY_SAFE(entry, tmp, &rscreen->fences.blocks, head) {
- LIST_DEL(&entry->head);
- FREE(entry);
+ struct r600_screen *rscreen = (struct r600_screen *)screen;
+ //TODO: select these params by asic
+ switch (param) {
+ case PIPE_COMPUTE_CAP_IR_TARGET: {
+ const char *gpu = r600_get_llvm_processor_name(rscreen->b.family);
+ if (ret) {
+ sprintf(ret, "%s-r600--", gpu);
}
-
- rscreen->ws->buffer_unmap(rscreen->fences.bo->cs_buf);
- si_resource_reference(&rscreen->fences.bo, NULL);
+ return (8 + strlen(gpu)) * sizeof(char);
}
- pipe_mutex_destroy(rscreen->fences.mutex);
-
- rscreen->ws->destroy(rscreen->ws);
- FREE(rscreen);
-}
+ case PIPE_COMPUTE_CAP_GRID_DIMENSION:
+ if (ret) {
+ uint64_t * grid_dimension = ret;
+ grid_dimension[0] = 3;
+ }
+ return 1 * sizeof(uint64_t);
+ case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
+ if (ret) {
+ uint64_t * grid_size = ret;
+ grid_size[0] = 65535;
+ grid_size[1] = 65535;
+ grid_size[2] = 1;
+ }
+ return 3 * sizeof(uint64_t) ;
+
+ case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
+ if (ret) {
+ uint64_t * block_size = ret;
+ block_size[0] = 256;
+ block_size[1] = 256;
+ block_size[2] = 256;
+ }
+ return 3 * sizeof(uint64_t);
+ case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
+ if (ret) {
+ uint64_t * max_threads_per_block = ret;
+ *max_threads_per_block = 256;
+ }
+ return sizeof(uint64_t);
-static void r600_fence_reference(struct pipe_screen *pscreen,
- struct pipe_fence_handle **ptr,
- struct pipe_fence_handle *fence)
-{
- struct r600_fence **oldf = (struct r600_fence**)ptr;
- struct r600_fence *newf = (struct r600_fence*)fence;
-
- if (pipe_reference(&(*oldf)->reference, &newf->reference)) {
- struct r600_screen *rscreen = (struct r600_screen *)pscreen;
- pipe_mutex_lock(rscreen->fences.mutex);
- si_resource_reference(&(*oldf)->sleep_bo, NULL);
- LIST_ADDTAIL(&(*oldf)->head, &rscreen->fences.pool);
- pipe_mutex_unlock(rscreen->fences.mutex);
+ case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE:
+ if (ret) {
+ uint64_t *max_global_size = ret;
+ /* XXX: Not sure what to put here. */
+ *max_global_size = 2000000000;
+ }
+ return sizeof(uint64_t);
+ case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
+ if (ret) {
+ uint64_t *max_local_size = ret;
+ /* Value reported by the closed source driver. */
+ *max_local_size = 32768;
+ }
+ return sizeof(uint64_t);
+ case PIPE_COMPUTE_CAP_MAX_INPUT_SIZE:
+ if (ret) {
+ uint64_t *max_input_size = ret;
+ /* Value reported by the closed source driver. */
+ *max_input_size = 1024;
+ }
+ return sizeof(uint64_t);
+ case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE:
+ if (ret) {
+ uint64_t max_global_size;
+ uint64_t *max_mem_alloc_size = ret;
+ r600_get_compute_param(screen, PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE, &max_global_size);
+ *max_mem_alloc_size = max_global_size / 4;
+ }
+ return sizeof(uint64_t);
+ default:
+ fprintf(stderr, "unknown PIPE_COMPUTE_CAP %d\n", param);
+ return 0;
}
-
- *ptr = fence;
}
-static boolean r600_fence_signalled(struct pipe_screen *pscreen,
- struct pipe_fence_handle *fence)
+static void r600_destroy_screen(struct pipe_screen* pscreen)
{
struct r600_screen *rscreen = (struct r600_screen *)pscreen;
- struct r600_fence *rfence = (struct r600_fence*)fence;
- return rscreen->fences.data[rfence->index] != 0;
-}
+ if (rscreen == NULL)
+ return;
-static boolean r600_fence_finish(struct pipe_screen *pscreen,
- struct pipe_fence_handle *fence,
- uint64_t timeout)
-{
- struct r600_screen *rscreen = (struct r600_screen *)pscreen;
- struct r600_fence *rfence = (struct r600_fence*)fence;
- int64_t start_time = 0;
- unsigned spins = 0;
+ if (!radeon_winsys_unref(rscreen->b.ws))
+ return;
- if (timeout != PIPE_TIMEOUT_INFINITE) {
- start_time = os_time_get();
+ r600_common_screen_cleanup(&rscreen->b);
- /* Convert to microseconds. */
- timeout /= 1000;
+#if R600_TRACE_CS
+ if (rscreen->trace_bo) {
+ rscreen->ws->buffer_unmap(rscreen->trace_bo->cs_buf);
+ pipe_resource_reference((struct pipe_resource**)&rscreen->trace_bo, NULL);
}
-
- while (rscreen->fences.data[rfence->index] == 0) {
- /* Special-case infinite timeout - wait for the dummy BO to become idle */
- if (timeout == PIPE_TIMEOUT_INFINITE) {
- rscreen->ws->buffer_wait(rfence->sleep_bo->buf, RADEON_USAGE_READWRITE);
- break;
- }
-
- /* The dummy BO will be busy until the CS including the fence has completed, or
- * the GPU is reset. Don't bother continuing to spin when the BO is idle. */
- if (!rscreen->ws->buffer_is_busy(rfence->sleep_bo->buf, RADEON_USAGE_READWRITE))
- break;
-
- if (++spins % 256)
- continue;
-#ifdef PIPE_OS_UNIX
- sched_yield();
-#else
- os_time_sleep(10);
#endif
- if (timeout != PIPE_TIMEOUT_INFINITE &&
- os_time_get() - start_time >= timeout) {
- break;
- }
- }
- return rscreen->fences.data[rfence->index] != 0;
-}
-
-static int evergreen_interpret_tiling(struct r600_screen *rscreen, uint32_t tiling_config)
-{
- switch (tiling_config & 0xf) {
- case 0:
- rscreen->tiling_info.num_channels = 1;
- break;
- case 1:
- rscreen->tiling_info.num_channels = 2;
- break;
- case 2:
- rscreen->tiling_info.num_channels = 4;
- break;
- case 3:
- rscreen->tiling_info.num_channels = 8;
- break;
- default:
- return -EINVAL;
- }
-
- switch ((tiling_config & 0xf0) >> 4) {
- case 0:
- rscreen->tiling_info.num_banks = 4;
- break;
- case 1:
- rscreen->tiling_info.num_banks = 8;
- break;
- case 2:
- rscreen->tiling_info.num_banks = 16;
- break;
- default:
- return -EINVAL;
- }
-
- switch ((tiling_config & 0xf00) >> 8) {
- case 0:
- rscreen->tiling_info.group_bytes = 256;
- break;
- case 1:
- rscreen->tiling_info.group_bytes = 512;
- break;
- default:
- return -EINVAL;
- }
- return 0;
+ rscreen->b.ws->destroy(rscreen->b.ws);
+ FREE(rscreen);
}
-static int r600_init_tiling(struct r600_screen *rscreen)
+static uint64_t r600_get_timestamp(struct pipe_screen *screen)
{
- uint32_t tiling_config = rscreen->info.r600_tiling_config;
-
- /* set default group bytes, overridden by tiling info ioctl */
- rscreen->tiling_info.group_bytes = 512;
-
- if (!tiling_config)
- return 0;
-
- return evergreen_interpret_tiling(rscreen, tiling_config);
-}
+ struct r600_screen *rscreen = (struct r600_screen*)screen;
-static unsigned radeon_family_from_device(unsigned device)
-{
- switch (device) {
-#define CHIPSET(pciid, name, family) case pciid: return CHIP_##family;
-#include "pci_ids/radeonsi_pci_ids.h"
-#undef CHIPSET
- default:
- return CHIP_UNKNOWN;
- }
+ return 1000000 * rscreen->b.ws->query_value(rscreen->b.ws, RADEON_TIMESTAMP) /
+ rscreen->b.info.r600_clock_crystal_freq;
}
struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws)
return NULL;
}
- rscreen->ws = ws;
- ws->query_info(ws, &rscreen->info);
-
- rscreen->family = radeon_family_from_device(rscreen->info.pci_id);
- if (rscreen->family == CHIP_UNKNOWN) {
- fprintf(stderr, "r600: Unknown chipset 0x%04X\n", rscreen->info.pci_id);
- FREE(rscreen);
- return NULL;
+ ws->query_info(ws, &rscreen->b.info);
+
+ /* Set functions first. */
+ rscreen->b.b.context_create = r600_create_context;
+ rscreen->b.b.destroy = r600_destroy_screen;
+ rscreen->b.b.get_name = r600_get_name;
+ rscreen->b.b.get_vendor = r600_get_vendor;
+ rscreen->b.b.get_param = r600_get_param;
+ rscreen->b.b.get_shader_param = r600_get_shader_param;
+ rscreen->b.b.get_paramf = r600_get_paramf;
+ rscreen->b.b.get_compute_param = r600_get_compute_param;
+ rscreen->b.b.get_timestamp = r600_get_timestamp;
+ rscreen->b.b.is_format_supported = si_is_format_supported;
+ if (rscreen->b.info.has_uvd) {
+ rscreen->b.b.get_video_param = ruvd_get_video_param;
+ rscreen->b.b.is_video_format_supported = ruvd_is_format_supported;
+ } else {
+ rscreen->b.b.get_video_param = r600_get_video_param;
+ rscreen->b.b.is_video_format_supported = vl_video_buffer_is_format_supported;
}
+ r600_init_screen_resource_functions(&rscreen->b.b);
- /* setup class */
- if (rscreen->family >= CHIP_TAHITI) {
- rscreen->chip_class = TAHITI;
- } else {
- fprintf(stderr, "r600: Unsupported family %d\n", rscreen->family);
+ if (!r600_common_screen_init(&rscreen->b, ws)) {
FREE(rscreen);
return NULL;
}
- if (r600_init_tiling(rscreen)) {
- FREE(rscreen);
- return NULL;
+ if (debug_get_bool_option("RADEON_DUMP_SHADERS", FALSE))
+ rscreen->b.debug_flags |= DBG_FS | DBG_VS | DBG_GS | DBG_PS | DBG_CS;
+
+#if R600_TRACE_CS
+ rscreen->cs_count = 0;
+ if (rscreen->info.drm_minor >= 28) {
+ rscreen->trace_bo = (struct r600_resource*)pipe_buffer_create(&rscreen->screen,
+ PIPE_BIND_CUSTOM,
+ PIPE_USAGE_STAGING,
+ 4096);
+ if (rscreen->trace_bo) {
+ rscreen->trace_ptr = rscreen->ws->buffer_map(rscreen->trace_bo->cs_buf, NULL,
+ PIPE_TRANSFER_UNSYNCHRONIZED);
+ }
}
+#endif
+
+ /* Create the auxiliary context. This must be done last. */
+ rscreen->b.aux_context = rscreen->b.b.context_create(&rscreen->b.b, NULL);
- rscreen->screen.destroy = r600_destroy_screen;
- rscreen->screen.get_name = r600_get_name;
- rscreen->screen.get_vendor = r600_get_vendor;
- rscreen->screen.get_param = r600_get_param;
- rscreen->screen.get_shader_param = r600_get_shader_param;
- rscreen->screen.get_paramf = r600_get_paramf;
- rscreen->screen.get_video_param = r600_get_video_param;
- rscreen->screen.is_format_supported = si_is_format_supported;
- rscreen->screen.is_video_format_supported = vl_video_buffer_is_format_supported;
- rscreen->screen.context_create = r600_create_context;
- rscreen->screen.fence_reference = r600_fence_reference;
- rscreen->screen.fence_signalled = r600_fence_signalled;
- rscreen->screen.fence_finish = r600_fence_finish;
- r600_init_screen_resource_functions(&rscreen->screen);
-
- util_format_s3tc_init();
-
- rscreen->fences.bo = NULL;
- rscreen->fences.data = NULL;
- rscreen->fences.next_index = 0;
- LIST_INITHEAD(&rscreen->fences.pool);
- LIST_INITHEAD(&rscreen->fences.blocks);
- pipe_mutex_init(rscreen->fences.mutex);
-
- return &rscreen->screen;
+ return &rscreen->b.b;
}
projects / mesa.git / blobdiff