radeonsi: Do not suspend timer queries

[mesa.git] / src / gallium / drivers / radeonsi / radeonsi_pipe.c

diff --git a/src/gallium/drivers/radeonsi/radeonsi_pipe.c b/src/gallium/drivers/radeonsi/radeonsi_pipe.c
index 69b9ca978984e38f1bce32d3b0167a9249c56aa9..8a5d7016d10b172304f4a35b251fa96a648d1afe 100644 (file)
--- a/src/gallium/drivers/radeonsi/radeonsi_pipe.c
+++ b/src/gallium/drivers/radeonsi/radeonsi_pipe.c
@@ -178,15 +178,21 @@ static void r600_destroy_context(struct pipe_context *context)
 {
        struct r600_context *rctx = (struct r600_context *)context;
 
+       si_release_all_descriptors(rctx);
+
        si_resource_reference(&rctx->border_color_table, NULL);
 
        if (rctx->dummy_pixel_shader) {
                rctx->context.delete_fs_state(&rctx->context, rctx->dummy_pixel_shader);
        }
-       rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush_depth_stencil);
-       rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush_depth);
-       rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush_stencil);
+       for (int i = 0; i < 8; i++) {
+               rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush_depth_stencil[i]);
+               rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush_depth[i]);
+               rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush_stencil[i]);
+       }
        rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush_inplace);
+       rctx->context.delete_blend_state(&rctx->context, rctx->custom_blend_resolve);
+       rctx->context.delete_blend_state(&rctx->context, rctx->custom_blend_decompress);
        util_unreference_framebuffer_state(&rctx->framebuffer);
 
        util_blitter_destroy(rctx->blitter);
@@ -224,25 +230,22 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen, void
        si_init_compute_functions(rctx);
 
        if (rscreen->info.has_uvd) {
-               rctx->context.create_video_decoder = radeonsi_uvd_create_decoder;
+               rctx->context.create_video_codec = radeonsi_uvd_create_decoder;
                rctx->context.create_video_buffer = radeonsi_video_buffer_create;
        } else {
-               rctx->context.create_video_decoder = vl_create_decoder;
+               rctx->context.create_video_codec = vl_create_decoder;
                rctx->context.create_video_buffer = vl_video_buffer_create;
        }
 
+       rctx->cs = rctx->ws->cs_create(rctx->ws, RING_GFX, NULL);
+
+       si_init_all_descriptors(rctx);
+
        switch (rctx->chip_class) {
        case SI:
-               si_init_state_functions(rctx);
-               LIST_INITHEAD(&rctx->active_query_list);
-               rctx->cs = rctx->ws->cs_create(rctx->ws, RING_GFX, NULL);
-               rctx->max_db = 8;
-               si_init_config(rctx);
-               break;
        case CIK:
                si_init_state_functions(rctx);
-               LIST_INITHEAD(&rctx->active_query_list);
-               rctx->cs = rctx->ws->cs_create(rctx->ws, RING_GFX, NULL);
+               LIST_INITHEAD(&rctx->active_nontimer_query_list);
                rctx->max_db = 8;
                si_init_config(rctx);
                break;
@@ -369,6 +372,10 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_TGSI_INSTANCEID:
        case PIPE_CAP_COMPUTE:
                return 1;
+
+       case PIPE_CAP_TEXTURE_MULTISAMPLE:
+               return HAVE_LLVM >= 0x0304 && rscreen->chip_class == SI;
+
        case PIPE_CAP_TGSI_TEXCOORD:
                return 0;
 
@@ -390,8 +397,6 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_VERTEX_COLOR_CLAMPED:
        case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
        case PIPE_CAP_USER_VERTEX_BUFFERS:
-       case PIPE_CAP_TEXTURE_MULTISAMPLE:
-       case PIPE_CAP_QUERY_TIMESTAMP:
        case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
        case PIPE_CAP_CUBE_MAP_ARRAY:
        case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
@@ -432,6 +437,7 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
                return 8;
 
        /* Timer queries, present when the clock frequency is non zero. */
+       case PIPE_CAP_QUERY_TIMESTAMP:
        case PIPE_CAP_QUERY_TIME_ELAPSED:
                return rscreen->info.r600_clock_crystal_freq != 0;
 
@@ -534,11 +540,12 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, e
 
 static int r600_get_video_param(struct pipe_screen *screen,
                                enum pipe_video_profile profile,
+                               enum pipe_video_entrypoint entrypoint,
                                enum pipe_video_cap param)
 {
        switch (param) {
        case PIPE_VIDEO_CAP_SUPPORTED:
-               return vl_profile_supported(screen, profile);
+               return vl_profile_supported(screen, profile, entrypoint);
        case PIPE_VIDEO_CAP_NPOT_TEXTURES:
                return 1;
        case PIPE_VIDEO_CAP_MAX_WIDTH:
@@ -546,6 +553,8 @@ static int r600_get_video_param(struct pipe_screen *screen,
                return vl_video_buffer_max_size(screen);
        case PIPE_VIDEO_CAP_PREFERED_FORMAT:
                return PIPE_FORMAT_NV12;
+       case PIPE_VIDEO_CAP_MAX_LEVEL:
+               return vl_level_supported(screen, profile);
        default:
                return 0;
        }
@@ -602,7 +611,20 @@ static int r600_get_compute_param(struct pipe_screen *screen,
                        *max_global_size = 2000000000;
                }
                return sizeof(uint64_t);
-
+       case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
+               if (ret) {
+                       uint64_t *max_local_size = ret;
+                       /* Value reported by the closed source driver. */
+                       *max_local_size = 32768;
+               }
+               return sizeof(uint64_t);
+       case PIPE_COMPUTE_CAP_MAX_INPUT_SIZE:
+               if (ret) {
+                       uint64_t *max_input_size = ret;
+                       /* Value reported by the closed source driver. */
+                       *max_input_size = 1024;
+               }
+               return sizeof(uint64_t);
        case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE:
                if (ret) {
                        uint64_t max_global_size;
@@ -779,6 +801,14 @@ static int r600_init_tiling(struct r600_screen *rscreen)
        return evergreen_interpret_tiling(rscreen, tiling_config);
 }
 
+static uint64_t r600_get_timestamp(struct pipe_screen *screen)
+{
+       struct r600_screen *rscreen = (struct r600_screen*)screen;
+
+       return 1000000 * rscreen->ws->query_value(rscreen->ws, RADEON_TIMESTAMP) /
+               rscreen->info.r600_clock_crystal_freq;
+}
+
 static unsigned radeon_family_from_device(unsigned device)
 {
        switch (device) {
@@ -830,6 +860,7 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws)
        rscreen->screen.get_shader_param = r600_get_shader_param;
        rscreen->screen.get_paramf = r600_get_paramf;
        rscreen->screen.get_compute_param = r600_get_compute_param;
+       rscreen->screen.get_timestamp = r600_get_timestamp;
        rscreen->screen.is_format_supported = si_is_format_supported;
        rscreen->screen.context_create = r600_create_context;
        rscreen->screen.fence_reference = r600_fence_reference;