#include "r600_resource.h"
#include "sid.h"
-#define R600_MAX_CONST_BUFFERS 1
-#define R600_MAX_CONST_BUFFER_SIZE 4096
-
#ifdef PIPE_ARCH_BIG_ENDIAN
#define R600_BIG_ENDIAN 1
#else
#define R600_BIG_ENDIAN 0
#endif
-enum r600_atom_flags {
- /* When set, atoms are added at the beginning of the dirty list
- * instead of the end. */
- EMIT_EARLY = (1 << 0)
-};
-
-/* This encapsulates a state or an operation which can emitted into the GPU
- * command stream. It's not limited to states only, it can be used for anything
- * that wants to write commands into the CS (e.g. cache flushes). */
-struct r600_atom {
- void (*emit)(struct r600_context *ctx, struct r600_atom *state);
-
- unsigned num_dw;
- enum r600_atom_flags flags;
- bool dirty;
+#define R600_TRACE_CS 0
+#define R600_TRACE_CS_DWORDS 6
- struct list_head head;
-};
-
-struct r600_atom_surface_sync {
- struct r600_atom atom;
- unsigned flush_flags; /* CP_COHER_CNTL */
-};
-
-enum r600_pipe_state_id {
- R600_PIPE_STATE_CONFIG,
- R600_PIPE_STATE_SEAMLESS_CUBEMAP,
- R600_PIPE_STATE_PS_SHADER,
- R600_PIPE_STATE_VS_SHADER,
- R600_PIPE_STATE_CONSTANT,
- R600_PIPE_STATE_SAMPLER,
- R600_PIPE_STATE_RESOURCE,
- R600_PIPE_NSTATES
-};
+struct si_pipe_compute;
struct r600_pipe_fences {
- struct r600_resource *bo;
+ struct si_resource *bo;
unsigned *data;
unsigned next_index;
/* linked list of preallocated blocks */
struct r600_tiling_info tiling_info;
struct util_slab_mempool pool_buffers;
struct r600_pipe_fences fences;
+#if R600_TRACE_CS
+ struct si_resource *trace_bo;
+ uint32_t *trace_ptr;
+ unsigned cs_count;
+#endif
};
struct si_pipe_sampler_view {
struct pipe_sampler_view base;
+ struct si_resource *resource;
uint32_t state[8];
};
struct si_pipe_sampler_state {
uint32_t val[4];
+ uint32_t border_color[4];
+};
+
+struct si_cs_shader_state {
+ struct si_pipe_compute *program;
};
/* needed for blitter save */
#define NUM_TEX_UNITS 16
struct r600_textures_info {
- struct r600_pipe_state views_state;
- struct r600_pipe_state samplers_state;
struct si_pipe_sampler_view *views[NUM_TEX_UNITS];
struct si_pipe_sampler_state *samplers[NUM_TEX_UNITS];
unsigned n_views;
+ uint32_t depth_texture_mask; /* which textures are depth */
unsigned n_samplers;
bool samplers_dirty;
bool is_array_sampler[NUM_TEX_UNITS];
struct r600_fence {
struct pipe_reference reference;
unsigned index; /* in the shared bo */
- struct r600_resource *sleep_bo;
+ struct si_resource *sleep_bo;
struct list_head head;
};
#define R600_CONSTANT_ARRAY_SIZE 256
#define R600_RESOURCE_ARRAY_SIZE 160
+struct r600_constbuf_state
+{
+ struct pipe_constant_buffer cb[2];
+ uint32_t enabled_mask;
+ uint32_t dirty_mask;
+};
+
struct r600_context {
struct pipe_context context;
struct blitter_context *blitter;
enum radeon_family family;
enum chip_class chip_class;
- void *custom_dsa_flush;
+ void *custom_dsa_flush_depth_stencil;
+ void *custom_dsa_flush_depth;
+ void *custom_dsa_flush_stencil;
+ void *custom_dsa_flush_inplace;
struct r600_screen *screen;
struct radeon_winsys *ws;
- struct r600_pipe_state *states[R600_PIPE_NSTATES];
struct si_vertex_element *vertex_elements;
struct pipe_framebuffer_state framebuffer;
unsigned pa_sc_line_stipple;
unsigned pa_su_sc_mode_cntl;
- unsigned pa_cl_clip_cntl;
- unsigned pa_cl_vs_out_cntl;
/* for saving when using blitter */
struct pipe_stencil_ref stencil_ref;
- struct r600_pipe_state config;
- struct si_pipe_shader *ps_shader;
- struct si_pipe_shader *vs_shader;
- struct r600_pipe_state vs_const_buffer;
- struct r600_pipe_state vs_user_data;
- struct r600_pipe_state ps_const_buffer;
+ struct si_pipe_shader_selector *ps_shader;
+ struct si_pipe_shader_selector *vs_shader;
+ struct si_cs_shader_state cs_shader_state;
struct pipe_query *current_render_cond;
unsigned current_render_cond_mode;
+ boolean current_render_cond_cond;
struct pipe_query *saved_render_cond;
unsigned saved_render_cond_mode;
+ boolean saved_render_cond_cond;
/* shader information */
unsigned sprite_coord_enable;
- boolean export_16bpc;
- unsigned alpha_ref;
- boolean alpha_ref_dirty;
+ unsigned export_16bpc;
+ struct r600_constbuf_state constbuf_state[PIPE_SHADER_TYPES];
struct r600_textures_info vs_samplers;
struct r600_textures_info ps_samplers;
- boolean shader_dirty;
+ struct si_resource *border_color_table;
+ unsigned border_color_offset;
struct u_upload_mgr *uploader;
struct util_slab_mempool pool_transfers;
- boolean have_depth_texture, have_depth_fb;
unsigned default_ps_gprs, default_vs_gprs;
- /* States based on r600_state. */
- struct list_head dirty_states;
- struct r600_atom_surface_sync atom_surface_sync;
- struct r600_atom atom_r6xx_flush_and_inv;
-
/* Below are variables from the old r600_context.
*/
struct radeon_winsys_cs *cs;
- struct r600_range *range;
- unsigned nblocks;
- struct r600_block **blocks;
- struct list_head dirty;
- struct list_head enable_list;
unsigned pm4_dirty_cdwords;
- unsigned ctx_pm4_ndwords;
- unsigned init_dwords;
/* The list of active queries. Only one query of each type can be active. */
struct list_head active_query_list;
struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS];
unsigned nr_vertex_buffers;
+ /* With rasterizer discard, there doesn't have to be a pixel shader.
+ * In that case, we bind this one: */
+ struct si_pipe_shader *dummy_pixel_shader;
+
/* SI state handling */
union si_state queued;
union si_state emitted;
};
-static INLINE void r600_emit_atom(struct r600_context *rctx, struct r600_atom *atom)
-{
- atom->emit(rctx, atom);
- atom->dirty = false;
- if (atom->head.next && atom->head.prev)
- LIST_DELINIT(&atom->head);
-}
-
-static INLINE void r600_atom_dirty(struct r600_context *rctx, struct r600_atom *state)
-{
- if (!state->dirty) {
- if (state->flags & EMIT_EARLY) {
- LIST_ADD(&state->head, &rctx->dirty_states);
- } else {
- LIST_ADDTAIL(&state->head, &rctx->dirty_states);
- }
- state->dirty = true;
- }
-}
-
-/* evergreen_state.c */
-void cayman_init_state_functions(struct r600_context *rctx);
-void si_pipe_shader_ps(struct pipe_context *ctx, struct si_pipe_shader *shader);
-void si_pipe_shader_vs(struct pipe_context *ctx, struct si_pipe_shader *shader);
-uint32_t si_translate_vertexformat(struct pipe_screen *screen,
- enum pipe_format format,
- const struct util_format_description *desc,
- int first_non_void);
-boolean si_is_format_supported(struct pipe_screen *screen,
- enum pipe_format format,
- enum pipe_texture_target target,
- unsigned sample_count,
- unsigned usage);
-
/* r600_blit.c */
-void r600_init_blit_functions(struct r600_context *rctx);
-void r600_blit_uncompress_depth(struct pipe_context *ctx, struct r600_resource_texture *texture);
-void r600_blit_push_depth(struct pipe_context *ctx, struct r600_resource_texture *texture);
-void r600_flush_depth_textures(struct r600_context *rctx);
+void si_init_blit_functions(struct r600_context *rctx);
+void si_blit_uncompress_depth(struct pipe_context *ctx,
+ struct r600_texture *texture,
+ struct r600_texture *staging,
+ unsigned first_level, unsigned last_level,
+ unsigned first_layer, unsigned last_layer);
+void si_flush_depth_textures(struct r600_context *rctx,
+ struct r600_textures_info *textures);
/* r600_buffer.c */
-bool r600_init_resource(struct r600_screen *rscreen,
- struct r600_resource *res,
- unsigned size, unsigned alignment,
- unsigned bind, unsigned usage);
-struct pipe_resource *r600_buffer_create(struct pipe_screen *screen,
- const struct pipe_resource *templ);
+bool si_init_resource(struct r600_screen *rscreen,
+ struct si_resource *res,
+ unsigned size, unsigned alignment,
+ boolean use_reusable_pool, unsigned usage);
+struct pipe_resource *si_buffer_create(struct pipe_screen *screen,
+ const struct pipe_resource *templ);
void r600_upload_index_buffer(struct r600_context *rctx,
struct pipe_index_buffer *ib, unsigned count);
/* r600_pipe.c */
void radeonsi_flush(struct pipe_context *ctx, struct pipe_fence_handle **fence,
unsigned flags);
+const char *r600_get_llvm_processor_name(enum radeon_family family);
/* r600_query.c */
void r600_init_query_functions(struct r600_context *rctx);
/* r600_resource.c */
void r600_init_context_resource_functions(struct r600_context *r600);
-/* radeonsi_shader.c */
-int si_pipe_shader_create(struct pipe_context *ctx, struct si_pipe_shader *shader);
-void si_pipe_shader_destroy(struct pipe_context *ctx, struct si_pipe_shader *shader);
-
/* r600_texture.c */
void r600_init_screen_texture_functions(struct pipe_screen *screen);
-void r600_init_surface_functions(struct r600_context *r600);
-unsigned r600_texture_get_offset(struct r600_resource_texture *rtex,
- unsigned level, unsigned layer);
+void si_init_surface_functions(struct r600_context *r600);
/* r600_translate.c */
void r600_translate_index_buffer(struct r600_context *r600,
struct pipe_index_buffer *ib,
unsigned count);
-/* r600_state_common.c */
-void r600_init_common_atoms(struct r600_context *rctx);
-unsigned r600_get_cb_flush_flags(struct r600_context *rctx);
-void r600_texture_barrier(struct pipe_context *ctx);
-void r600_set_index_buffer(struct pipe_context *ctx,
- const struct pipe_index_buffer *ib);
-void r600_set_vertex_buffers(struct pipe_context *ctx, unsigned count,
- const struct pipe_vertex_buffer *buffers);
-void *si_create_vertex_elements(struct pipe_context *ctx,
- unsigned count,
- const struct pipe_vertex_element *elements);
-void r600_delete_vertex_element(struct pipe_context *ctx, void *state);
-void r600_bind_dsa_state(struct pipe_context *ctx, void *state);
-void r600_sampler_view_destroy(struct pipe_context *ctx,
- struct pipe_sampler_view *state);
-void r600_delete_state(struct pipe_context *ctx, void *state);
-void r600_bind_vertex_elements(struct pipe_context *ctx, void *state);
-void r600_bind_ps_shader(struct pipe_context *ctx, void *state);
-void r600_bind_vs_shader(struct pipe_context *ctx, void *state);
-void r600_delete_ps_shader(struct pipe_context *ctx, void *state);
-void r600_delete_vs_shader(struct pipe_context *ctx, void *state);
-void r600_set_constant_buffer(struct pipe_context *ctx, uint shader, uint index,
- struct pipe_constant_buffer *cb);
-struct pipe_stream_output_target *
-r600_create_so_target(struct pipe_context *ctx,
- struct pipe_resource *buffer,
- unsigned buffer_offset,
- unsigned buffer_size);
-void r600_so_target_destroy(struct pipe_context *ctx,
- struct pipe_stream_output_target *target);
-void r600_set_so_targets(struct pipe_context *ctx,
- unsigned num_targets,
- struct pipe_stream_output_target **targets,
- unsigned append_bitmask);
-void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info);
+#if R600_TRACE_CS
+void r600_trace_emit(struct r600_context *rctx);
+#endif
+
+/* radeonsi_compute.c */
+void si_init_compute_functions(struct r600_context *rctx);
+
+/* radeonsi_uvd.c */
+struct pipe_video_decoder *radeonsi_uvd_create_decoder(struct pipe_context *context,
+ enum pipe_video_profile profile,
+ enum pipe_video_entrypoint entrypoint,
+ enum pipe_video_chroma_format chroma_format,
+ unsigned width, unsigned height,
+ unsigned max_references, bool expect_chunked_decode);
+
+struct pipe_video_buffer *radeonsi_video_buffer_create(struct pipe_context *pipe,
+ const struct pipe_video_buffer *tmpl);
/*
* common helpers
static INLINE uint64_t r600_resource_va(struct pipe_screen *screen, struct pipe_resource *resource)
{
struct r600_screen *rscreen = (struct r600_screen*)screen;
- struct r600_resource *rresource = (struct r600_resource*)resource;
+ struct si_resource *rresource = (struct si_resource*)resource;
return rscreen->ws->buffer_get_virtual_address(rresource->cs_buf);
}