#include "tgsi/tgsi_info.h"
#include "tgsi/tgsi_parse.h"
#include "tgsi/tgsi_scan.h"
+#include "tgsi/tgsi_util.h"
#include "tgsi/tgsi_dump.h"
#include "radeonsi_pipe.h"
unsigned type; /* TGSI_PROCESSOR_* specifies the type of shader. */
LLVMValueRef const_md;
LLVMValueRef const_resource;
+#if HAVE_LLVM >= 0x0304
+ LLVMValueRef ddxy_lds;
+#endif
LLVMValueRef *constants;
LLVMValueRef *resources;
LLVMValueRef *samplers;
#define USE_SGPR_MAX_SUFFIX_LEN 5
#define CONST_ADDR_SPACE 2
+#define LOCAL_ADDR_SPACE 3
#define USER_SGPR_ADDR_SPACE 8
/**
struct si_shader *shader = &si_shader_ctx->shader->shader;
struct lp_build_context * base =
&si_shader_ctx->radeon_bld.soa.bld_base.base;
+ struct lp_build_context *uint =
+ &si_shader_ctx->radeon_bld.soa.bld_base.uint_bld;
struct gallivm_state * gallivm = base->gallivm;
LLVMTypeRef input_type = LLVMFloatTypeInContext(gallivm->context);
LLVMValueRef main_fn = si_shader_ctx->radeon_bld.main_fn;
}
shader->ninterp++;
+ } else if (decl->Semantic.Name == TGSI_SEMANTIC_FOG) {
+ LLVMValueRef args[4];
+
+ args[0] = uint->zero;
+ args[1] = attr_number;
+ args[2] = params;
+ args[3] = interp_param;
+ si_shader_ctx->radeon_bld.inputs[radeon_llvm_reg_index_soa(input_index, 0)] =
+ build_intrinsic(base->gallivm->builder, intr_name,
+ input_type, args, args[3] ? 4 : 3,
+ LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
+ si_shader_ctx->radeon_bld.inputs[radeon_llvm_reg_index_soa(input_index, 1)] =
+ si_shader_ctx->radeon_bld.inputs[radeon_llvm_reg_index_soa(input_index, 2)] =
+ lp_build_const_float(gallivm, 0.0f);
+ si_shader_ctx->radeon_bld.inputs[radeon_llvm_reg_index_soa(input_index, 3)] =
+ lp_build_const_float(gallivm, 1.0f);
} else {
for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
LLVMValueRef args[4];
else
si_shader_ctx->shader->spi_shader_col_format |=
V_028714_SPI_SHADER_32_ABGR << (4 * cbuf);
+
+ si_shader_ctx->shader->cb_shader_mask |= 0xf << (4 * cbuf);
}
}
}
}
+static void si_alpha_to_one(struct lp_build_tgsi_context *bld_base,
+ unsigned index)
+{
+ struct si_shader_context *si_shader_ctx = si_shader_context(bld_base);
+
+ /* set alpha to one */
+ LLVMBuildStore(bld_base->base.gallivm->builder,
+ bld_base->base.one,
+ si_shader_ctx->radeon_bld.soa.outputs[index][3]);
+}
+
+static void si_llvm_emit_clipvertex(struct lp_build_tgsi_context * bld_base,
+ LLVMValueRef (*pos)[9], unsigned index)
+{
+ struct si_shader_context *si_shader_ctx = si_shader_context(bld_base);
+ struct si_pipe_shader *shader = si_shader_ctx->shader;
+ struct lp_build_context *base = &bld_base->base;
+ struct lp_build_context *uint = &si_shader_ctx->radeon_bld.soa.bld_base.uint_bld;
+ unsigned reg_index;
+ unsigned chan;
+ unsigned const_chan;
+ LLVMValueRef out_elts[4];
+ LLVMValueRef base_elt;
+ LLVMValueRef ptr = LLVMGetParam(si_shader_ctx->radeon_bld.main_fn, SI_PARAM_CONST);
+ LLVMValueRef const_resource = build_indexed_load(si_shader_ctx, ptr, uint->one);
+
+ for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
+ LLVMValueRef out_ptr = si_shader_ctx->radeon_bld.soa.outputs[index][chan];
+ out_elts[chan] = LLVMBuildLoad(base->gallivm->builder, out_ptr, "");
+ }
+
+ for (reg_index = 0; reg_index < 2; reg_index ++) {
+ LLVMValueRef *args = pos[2 + reg_index];
+
+ if (!(shader->key.vs.ucps_enabled & (1 << reg_index)))
+ continue;
+
+ shader->shader.clip_dist_write |= 0xf << (4 * reg_index);
+
+ args[5] =
+ args[6] =
+ args[7] =
+ args[8] = lp_build_const_float(base->gallivm, 0.0f);
+
+ /* Compute dot products of position and user clip plane vectors */
+ for (chan = 0; chan < TGSI_NUM_CHANNELS; chan++) {
+ for (const_chan = 0; const_chan < TGSI_NUM_CHANNELS; const_chan++) {
+ args[0] = const_resource;
+ args[1] = lp_build_const_int32(base->gallivm,
+ ((reg_index * 4 + chan) * 4 +
+ const_chan) * 4);
+ base_elt = build_intrinsic(base->gallivm->builder,
+ "llvm.SI.load.const",
+ base->elem_type,
+ args, 2,
+ LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
+ args[5 + chan] =
+ lp_build_add(base, args[5 + chan],
+ lp_build_mul(base, base_elt,
+ out_elts[const_chan]));
+ }
+ }
+
+ args[0] = lp_build_const_int32(base->gallivm, 0xf);
+ args[1] = uint->zero;
+ args[2] = uint->zero;
+ args[3] = lp_build_const_int32(base->gallivm,
+ V_008DFC_SQ_EXP_POS + 2 + reg_index);
+ args[4] = uint->zero;
+ }
+}
+
/* XXX: This is partially implemented for VS only at this point. It is not complete */
static void si_llvm_emit_epilogue(struct lp_build_tgsi_context * bld_base)
{
struct tgsi_parse_context *parse = &si_shader_ctx->parse;
LLVMValueRef args[9];
LLVMValueRef last_args[9] = { 0 };
+ LLVMValueRef pos_args[4][9] = { { 0 } };
+ unsigned semantic_name;
unsigned color_count = 0;
unsigned param_count = 0;
int depth_index = -1, stencil_index = -1;
+ int i;
while (!tgsi_parse_end_of_tokens(parse)) {
struct tgsi_full_declaration *d =
&parse->FullToken.FullDeclaration;
unsigned target;
unsigned index;
- int i;
tgsi_parse_token(parse);
continue;
}
+ semantic_name = d->Semantic.Name;
+handle_semantic:
for (index = d->Range.First; index <= d->Range.Last; index++) {
/* Select the correct target */
- switch(d->Semantic.Name) {
+ switch(semantic_name) {
case TGSI_SEMANTIC_PSIZE:
shader->vs_out_misc_write = 1;
shader->vs_out_point_size = 1;
param_count++;
} else {
target = V_008DFC_SQ_EXP_MRT + color_count;
+ if (si_shader_ctx->shader->key.ps.alpha_to_one) {
+ si_alpha_to_one(bld_base, index);
+ }
if (color_count == 0 &&
si_shader_ctx->shader->key.ps.alpha_func != PIPE_FUNC_ALWAYS)
si_alpha_test(bld_base, index);
color_count++;
}
break;
+ case TGSI_SEMANTIC_CLIPDIST:
+ if (!(si_shader_ctx->shader->key.vs.ucps_enabled &
+ (1 << d->Semantic.Index)))
+ continue;
+ shader->clip_dist_write |=
+ d->Declaration.UsageMask << (d->Semantic.Index << 2);
+ target = V_008DFC_SQ_EXP_POS + 2 + d->Semantic.Index;
+ break;
+ case TGSI_SEMANTIC_CLIPVERTEX:
+ si_llvm_emit_clipvertex(bld_base, pos_args, index);
+ continue;
case TGSI_SEMANTIC_FOG:
case TGSI_SEMANTIC_GENERIC:
target = V_008DFC_SQ_EXP_PARAM + param_count;
target = 0;
fprintf(stderr,
"Warning: SI unhandled output type:%d\n",
- d->Semantic.Name);
+ semantic_name);
}
si_llvm_init_export_args(bld_base, d, index, target, args);
- if (si_shader_ctx->type == TGSI_PROCESSOR_VERTEX ?
- (d->Semantic.Name == TGSI_SEMANTIC_POSITION) :
- (d->Semantic.Name == TGSI_SEMANTIC_COLOR)) {
+ if (si_shader_ctx->type == TGSI_PROCESSOR_VERTEX &&
+ target >= V_008DFC_SQ_EXP_POS &&
+ target <= (V_008DFC_SQ_EXP_POS + 3)) {
+ memcpy(pos_args[target - V_008DFC_SQ_EXP_POS],
+ args, sizeof(args));
+ } else if (si_shader_ctx->type == TGSI_PROCESSOR_FRAGMENT &&
+ semantic_name == TGSI_SEMANTIC_COLOR) {
if (last_args[0]) {
lp_build_intrinsic(base->gallivm->builder,
"llvm.SI.export",
}
}
+
+ if (semantic_name == TGSI_SEMANTIC_CLIPDIST) {
+ semantic_name = TGSI_SEMANTIC_GENERIC;
+ goto handle_semantic;
+ }
}
if (depth_index >= 0 || stencil_index >= 0) {
memcpy(last_args, args, sizeof(args));
}
- if (!last_args[0]) {
- assert(si_shader_ctx->type == TGSI_PROCESSOR_FRAGMENT);
-
- /* Specify which components to enable */
- last_args[0] = lp_build_const_int32(base->gallivm, 0x0);
-
- /* Specify the target we are exporting */
- last_args[3] = lp_build_const_int32(base->gallivm, V_008DFC_SQ_EXP_MRT);
-
- /* Set COMPR flag to zero to export data as 32-bit */
- last_args[4] = uint->zero;
-
- /* dummy bits */
- last_args[5]= uint->zero;
- last_args[6]= uint->zero;
- last_args[7]= uint->zero;
- last_args[8]= uint->zero;
-
- si_shader_ctx->shader->spi_shader_col_format |=
- V_028714_SPI_SHADER_32_ABGR;
- }
-
- /* Specify whether the EXEC mask represents the valid mask */
- last_args[1] = lp_build_const_int32(base->gallivm,
- si_shader_ctx->type == TGSI_PROCESSOR_FRAGMENT);
+ if (si_shader_ctx->type == TGSI_PROCESSOR_VERTEX) {
+ unsigned pos_idx = 0;
- if (shader->fs_write_all && shader->nr_cbufs > 1) {
- int i;
+ for (i = 0; i < 4; i++)
+ if (pos_args[i][0])
+ shader->nr_pos_exports++;
- /* Specify that this is not yet the last export */
- last_args[2] = lp_build_const_int32(base->gallivm, 0);
+ for (i = 0; i < 4; i++) {
+ if (!pos_args[i][0])
+ continue;
- for (i = 1; i < shader->nr_cbufs; i++) {
/* Specify the target we are exporting */
- last_args[3] = lp_build_const_int32(base->gallivm,
- V_008DFC_SQ_EXP_MRT + i);
+ pos_args[i][3] = lp_build_const_int32(base->gallivm, V_008DFC_SQ_EXP_POS + pos_idx++);
+
+ if (pos_idx == shader->nr_pos_exports)
+ /* Specify that this is the last export */
+ pos_args[i][2] = uint->one;
lp_build_intrinsic(base->gallivm->builder,
"llvm.SI.export",
LLVMVoidTypeInContext(base->gallivm->context),
- last_args, 9);
+ pos_args[i], 9);
+ }
+ } else {
+ if (!last_args[0]) {
+ /* Specify which components to enable */
+ last_args[0] = lp_build_const_int32(base->gallivm, 0x0);
+
+ /* Specify the target we are exporting */
+ last_args[3] = lp_build_const_int32(base->gallivm, V_008DFC_SQ_EXP_MRT);
+
+ /* Set COMPR flag to zero to export data as 32-bit */
+ last_args[4] = uint->zero;
+
+ /* dummy bits */
+ last_args[5]= uint->zero;
+ last_args[6]= uint->zero;
+ last_args[7]= uint->zero;
+ last_args[8]= uint->zero;
si_shader_ctx->shader->spi_shader_col_format |=
- si_shader_ctx->shader->spi_shader_col_format << 4;
+ V_028714_SPI_SHADER_32_ABGR;
+ si_shader_ctx->shader->cb_shader_mask |= S_02823C_OUTPUT0_ENABLE(0xf);
}
- last_args[3] = lp_build_const_int32(base->gallivm, V_008DFC_SQ_EXP_MRT);
- }
+ /* Specify whether the EXEC mask represents the valid mask */
+ last_args[1] = uint->one;
+
+ if (shader->fs_write_all && shader->nr_cbufs > 1) {
+ int i;
- /* Specify that this is the last export */
- last_args[2] = lp_build_const_int32(base->gallivm, 1);
+ /* Specify that this is not yet the last export */
+ last_args[2] = lp_build_const_int32(base->gallivm, 0);
- lp_build_intrinsic(base->gallivm->builder,
- "llvm.SI.export",
- LLVMVoidTypeInContext(base->gallivm->context),
- last_args, 9);
+ for (i = 1; i < shader->nr_cbufs; i++) {
+ /* Specify the target we are exporting */
+ last_args[3] = lp_build_const_int32(base->gallivm,
+ V_008DFC_SQ_EXP_MRT + i);
+ lp_build_intrinsic(base->gallivm->builder,
+ "llvm.SI.export",
+ LLVMVoidTypeInContext(base->gallivm->context),
+ last_args, 9);
+
+ si_shader_ctx->shader->spi_shader_col_format |=
+ si_shader_ctx->shader->spi_shader_col_format << 4;
+ si_shader_ctx->shader->cb_shader_mask |=
+ si_shader_ctx->shader->cb_shader_mask << 4;
+ }
+
+ last_args[3] = lp_build_const_int32(base->gallivm, V_008DFC_SQ_EXP_MRT);
+ }
+
+ /* Specify that this is the last export */
+ last_args[2] = lp_build_const_int32(base->gallivm, 1);
+
+ lp_build_intrinsic(base->gallivm->builder,
+ "llvm.SI.export",
+ LLVMVoidTypeInContext(base->gallivm->context),
+ last_args, 9);
+ }
/* XXX: Look up what this function does */
/* ctx->shader->output[i].spi_sid = r600_spi_sid(&ctx->shader->output[i]);*/
}
+static const struct lp_build_tgsi_action txf_action;
+
+static void build_tex_intrinsic(const struct lp_build_tgsi_action * action,
+ struct lp_build_tgsi_context * bld_base,
+ struct lp_build_emit_data * emit_data);
+
static void tex_fetch_args(
struct lp_build_tgsi_context * bld_base,
struct lp_build_emit_data * emit_data)
const struct tgsi_full_instruction * inst = emit_data->inst;
unsigned opcode = inst->Instruction.Opcode;
unsigned target = inst->Texture.Texture;
+ unsigned sampler_src, sampler_index;
LLVMValueRef coords[4];
LLVMValueRef address[16];
+ LLVMValueRef sample_index_rewrite = NULL;
+ LLVMValueRef sample_chan = NULL;
+ int ref_pos;
+ unsigned num_coords = tgsi_util_get_texture_coord_dim(target, &ref_pos);
unsigned count = 0;
unsigned chan;
if (opcode == TGSI_OPCODE_TXB)
address[count++] = coords[3];
- if ((target == TGSI_TEXTURE_CUBE || target == TGSI_TEXTURE_SHADOWCUBE) &&
- opcode != TGSI_OPCODE_TXQ)
+ if (target == TGSI_TEXTURE_CUBE || target == TGSI_TEXTURE_SHADOWCUBE)
radeon_llvm_emit_prepare_cube_coords(bld_base, emit_data, coords);
/* Pack depth comparison value */
case TGSI_TEXTURE_SHADOW1D_ARRAY:
case TGSI_TEXTURE_SHADOW2D:
case TGSI_TEXTURE_SHADOWRECT:
- address[count++] = coords[2];
- break;
case TGSI_TEXTURE_SHADOWCUBE:
case TGSI_TEXTURE_SHADOW2D_ARRAY:
- address[count++] = coords[3];
+ assert(ref_pos >= 0);
+ address[count++] = coords[ref_pos];
break;
case TGSI_TEXTURE_SHADOWCUBE_ARRAY:
address[count++] = lp_build_emit_fetch(bld_base, inst, 1, 0);
}
- /* Pack texture coordinates */
- address[count++] = coords[0];
- switch (target) {
- case TGSI_TEXTURE_2D:
- case TGSI_TEXTURE_2D_ARRAY:
- case TGSI_TEXTURE_3D:
- case TGSI_TEXTURE_CUBE:
- case TGSI_TEXTURE_RECT:
- case TGSI_TEXTURE_SHADOW2D:
- case TGSI_TEXTURE_SHADOWRECT:
- case TGSI_TEXTURE_SHADOW2D_ARRAY:
- case TGSI_TEXTURE_SHADOWCUBE:
- case TGSI_TEXTURE_2D_MSAA:
- case TGSI_TEXTURE_2D_ARRAY_MSAA:
- case TGSI_TEXTURE_CUBE_ARRAY:
- case TGSI_TEXTURE_SHADOWCUBE_ARRAY:
- address[count++] = coords[1];
- }
- switch (target) {
- case TGSI_TEXTURE_3D:
- case TGSI_TEXTURE_CUBE:
- case TGSI_TEXTURE_SHADOWCUBE:
- case TGSI_TEXTURE_CUBE_ARRAY:
- case TGSI_TEXTURE_SHADOWCUBE_ARRAY:
- address[count++] = coords[2];
+ /* Pack user derivatives */
+ if (opcode == TGSI_OPCODE_TXD) {
+ for (chan = 0; chan < 2; chan++) {
+ address[count++] = lp_build_emit_fetch(bld_base, inst, 1, chan);
+ if (num_coords > 1)
+ address[count++] = lp_build_emit_fetch(bld_base, inst, 2, chan);
+ }
}
- /* Pack array slice */
- switch (target) {
- case TGSI_TEXTURE_1D_ARRAY:
+ /* Pack texture coordinates */
+ address[count++] = coords[0];
+ if (num_coords > 1)
address[count++] = coords[1];
- }
- switch (target) {
- case TGSI_TEXTURE_2D_ARRAY:
- case TGSI_TEXTURE_2D_ARRAY_MSAA:
- case TGSI_TEXTURE_SHADOW2D_ARRAY:
+ if (num_coords > 2)
address[count++] = coords[2];
- }
- switch (target) {
- case TGSI_TEXTURE_CUBE_ARRAY:
- case TGSI_TEXTURE_SHADOW1D_ARRAY:
- case TGSI_TEXTURE_SHADOWCUBE_ARRAY:
- address[count++] = coords[3];
- }
/* Pack LOD */
- if (opcode == TGSI_OPCODE_TXL)
+ if (opcode == TGSI_OPCODE_TXL || opcode == TGSI_OPCODE_TXF)
address[count++] = coords[3];
if (count > 16) {
"");
}
- /* Pad to power of two vector */
- while (count < util_next_power_of_two(count))
- address[count++] = LLVMGetUndef(LLVMInt32TypeInContext(gallivm->context));
+ sampler_src = emit_data->inst->Instruction.NumSrcRegs - 1;
+ sampler_index = emit_data->inst->Src[sampler_src].Register.Index;
- emit_data->args[0] = lp_build_gather_values(gallivm, address, count);
+ /* Adjust the sample index according to FMASK.
+ *
+ * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
+ * which is the identity mapping. Each nibble says which physical sample
+ * should be fetched to get that sample.
+ *
+ * For example, 0x11111100 means there are only 2 samples stored and
+ * the second sample covers 3/4 of the pixel. When reading samples 0
+ * and 1, return physical sample 0 (determined by the first two 0s
+ * in FMASK), otherwise return physical sample 1.
+ *
+ * The sample index should be adjusted as follows:
+ * sample_index = (fmask >> (sample_index * 4)) & 0xF;
+ */
+ if (target == TGSI_TEXTURE_2D_MSAA ||
+ target == TGSI_TEXTURE_2D_ARRAY_MSAA) {
+ struct lp_build_context *uint_bld = &bld_base->uint_bld;
+ struct lp_build_emit_data txf_emit_data = *emit_data;
+ LLVMValueRef txf_address[16];
+ unsigned txf_count = count;
+
+ memcpy(txf_address, address, sizeof(address));
+
+ /* Pad to a power-of-two size. */
+ while (txf_count < util_next_power_of_two(txf_count))
+ txf_address[txf_count++] = LLVMGetUndef(LLVMInt32TypeInContext(gallivm->context));
+
+ /* Read FMASK using TXF. */
+ txf_emit_data.chan = 0;
+ txf_emit_data.dst_type = LLVMVectorType(
+ LLVMInt32TypeInContext(bld_base->base.gallivm->context), 4);
+ txf_emit_data.args[0] = lp_build_gather_values(gallivm, txf_address, txf_count);
+ txf_emit_data.args[1] = si_shader_ctx->resources[FMASK_TEX_OFFSET + sampler_index];
+ txf_emit_data.args[2] = lp_build_const_int32(bld_base->base.gallivm, target);
+ txf_emit_data.arg_count = 3;
+
+ build_tex_intrinsic(&txf_action, bld_base, &txf_emit_data);
+
+ /* Initialize some constants. */
+ if (target == TGSI_TEXTURE_2D_MSAA) {
+ sample_chan = LLVMConstInt(uint_bld->elem_type, 2, 0);
+ } else {
+ sample_chan = LLVMConstInt(uint_bld->elem_type, 3, 0);
+ }
- /* Resource */
- emit_data->args[1] = si_shader_ctx->resources[emit_data->inst->Src[1].Register.Index];
+ LLVMValueRef four = LLVMConstInt(uint_bld->elem_type, 4, 0);
+ LLVMValueRef F = LLVMConstInt(uint_bld->elem_type, 0xF, 0);
- /* Sampler */
- emit_data->args[2] = si_shader_ctx->samplers[emit_data->inst->Src[1].Register.Index];
+ /* Apply the formula. */
+ LLVMValueRef fmask =
+ LLVMBuildExtractElement(gallivm->builder,
+ txf_emit_data.output[0],
+ uint_bld->zero, "");
- /* Dimensions */
- emit_data->args[3] = lp_build_const_int32(bld_base->base.gallivm, target);
+ LLVMValueRef sample_index =
+ LLVMBuildExtractElement(gallivm->builder,
+ txf_emit_data.args[0],
+ sample_chan, "");
- emit_data->arg_count = 4;
+ LLVMValueRef sample_index4 =
+ LLVMBuildMul(gallivm->builder, sample_index, four, "");
- emit_data->dst_type = LLVMVectorType(
+ LLVMValueRef shifted_fmask =
+ LLVMBuildLShr(gallivm->builder, fmask, sample_index4, "");
+
+ LLVMValueRef final_sample =
+ LLVMBuildAnd(gallivm->builder, shifted_fmask, F, "");
+
+ /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
+ * resource descriptor is 0 (invalid),
+ */
+ LLVMValueRef fmask_desc =
+ LLVMBuildBitCast(gallivm->builder,
+ si_shader_ctx->resources[FMASK_TEX_OFFSET + sampler_index],
+ LLVMVectorType(uint_bld->elem_type, 8), "");
+
+ LLVMValueRef fmask_word1 =
+ LLVMBuildExtractElement(gallivm->builder, fmask_desc,
+ uint_bld->one, "");
+
+ LLVMValueRef word1_is_nonzero =
+ LLVMBuildICmp(gallivm->builder, LLVMIntNE,
+ fmask_word1, uint_bld->zero, "");
+
+ sample_index_rewrite =
+ LLVMBuildSelect(gallivm->builder, word1_is_nonzero,
+ final_sample, sample_index, "");
+ }
+
+ /* Resource */
+ emit_data->args[1] = si_shader_ctx->resources[sampler_index];
+
+ if (opcode == TGSI_OPCODE_TXF) {
+ /* add tex offsets */
+ if (inst->Texture.NumOffsets) {
+ struct lp_build_context *uint_bld = &bld_base->uint_bld;
+ struct lp_build_tgsi_soa_context *bld = lp_soa_context(bld_base);
+ const struct tgsi_texture_offset * off = inst->TexOffsets;
+
+ assert(inst->Texture.NumOffsets == 1);
+
+ address[0] =
+ lp_build_add(uint_bld, address[0],
+ bld->immediates[off->Index][off->SwizzleX]);
+ if (num_coords > 1)
+ address[1] =
+ lp_build_add(uint_bld, address[1],
+ bld->immediates[off->Index][off->SwizzleY]);
+ if (num_coords > 2)
+ address[2] =
+ lp_build_add(uint_bld, address[2],
+ bld->immediates[off->Index][off->SwizzleZ]);
+ }
+
+ emit_data->dst_type = LLVMVectorType(
+ LLVMInt32TypeInContext(bld_base->base.gallivm->context),
+ 4);
+
+ emit_data->arg_count = 3;
+ } else {
+ /* Sampler */
+ emit_data->args[2] = si_shader_ctx->samplers[sampler_index];
+
+ emit_data->dst_type = LLVMVectorType(
LLVMFloatTypeInContext(bld_base->base.gallivm->context),
4);
+
+ emit_data->arg_count = 4;
+ }
+
+ /* Dimensions */
+ emit_data->args[emit_data->arg_count - 1] =
+ lp_build_const_int32(bld_base->base.gallivm, target);
+
+ /* Pad to power of two vector */
+ while (count < util_next_power_of_two(count))
+ address[count++] = LLVMGetUndef(LLVMInt32TypeInContext(gallivm->context));
+
+ emit_data->args[0] = lp_build_gather_values(gallivm, address, count);
+
+ /* Replace the MSAA sample index if needed. */
+ if (sample_index_rewrite) {
+ emit_data->args[0] =
+ LLVMBuildInsertElement(gallivm->builder, emit_data->args[0],
+ sample_index_rewrite, sample_chan, "");
+ }
}
static void build_tex_intrinsic(const struct lp_build_tgsi_action * action,
LLVMReadNoneAttribute | LLVMNoUnwindAttribute);
}
+static void txq_fetch_args(
+ struct lp_build_tgsi_context * bld_base,
+ struct lp_build_emit_data * emit_data)
+{
+ struct si_shader_context *si_shader_ctx = si_shader_context(bld_base);
+ const struct tgsi_full_instruction *inst = emit_data->inst;
+
+ /* Mip level */
+ emit_data->args[0] = lp_build_emit_fetch(bld_base, inst, 0, TGSI_CHAN_X);
+
+ /* Resource */
+ emit_data->args[1] = si_shader_ctx->resources[inst->Src[1].Register.Index];
+
+ /* Dimensions */
+ emit_data->args[2] = lp_build_const_int32(bld_base->base.gallivm,
+ inst->Texture.Texture);
+
+ emit_data->arg_count = 3;
+
+ emit_data->dst_type = LLVMVectorType(
+ LLVMInt32TypeInContext(bld_base->base.gallivm->context),
+ 4);
+}
+
+#if HAVE_LLVM >= 0x0304
+
+static void si_llvm_emit_ddxy(
+ const struct lp_build_tgsi_action * action,
+ struct lp_build_tgsi_context * bld_base,
+ struct lp_build_emit_data * emit_data)
+{
+ struct si_shader_context *si_shader_ctx = si_shader_context(bld_base);
+ struct gallivm_state *gallivm = bld_base->base.gallivm;
+ struct lp_build_context * base = &bld_base->base;
+ const struct tgsi_full_instruction *inst = emit_data->inst;
+ unsigned opcode = inst->Instruction.Opcode;
+ LLVMValueRef indices[2];
+ LLVMValueRef store_ptr, load_ptr0, load_ptr1;
+ LLVMValueRef tl, trbl, result[4];
+ LLVMTypeRef i32;
+ unsigned swizzle[4];
+ unsigned c;
+
+ i32 = LLVMInt32TypeInContext(gallivm->context);
+
+ indices[0] = bld_base->uint_bld.zero;
+ indices[1] = build_intrinsic(gallivm->builder, "llvm.SI.tid", i32,
+ NULL, 0, LLVMReadNoneAttribute);
+ store_ptr = LLVMBuildGEP(gallivm->builder, si_shader_ctx->ddxy_lds,
+ indices, 2, "");
+
+ indices[1] = LLVMBuildAnd(gallivm->builder, indices[1],
+ lp_build_const_int32(gallivm, 0xfffffffc), "");
+ load_ptr0 = LLVMBuildGEP(gallivm->builder, si_shader_ctx->ddxy_lds,
+ indices, 2, "");
+
+ indices[1] = LLVMBuildAdd(gallivm->builder, indices[1],
+ lp_build_const_int32(gallivm,
+ opcode == TGSI_OPCODE_DDX ? 1 : 2),
+ "");
+ load_ptr1 = LLVMBuildGEP(gallivm->builder, si_shader_ctx->ddxy_lds,
+ indices, 2, "");
+
+ for (c = 0; c < 4; ++c) {
+ unsigned i;
+
+ swizzle[c] = tgsi_util_get_full_src_register_swizzle(&inst->Src[0], c);
+ for (i = 0; i < c; ++i) {
+ if (swizzle[i] == swizzle[c]) {
+ result[c] = result[i];
+ break;
+ }
+ }
+ if (i != c)
+ continue;
+
+ LLVMBuildStore(gallivm->builder,
+ LLVMBuildBitCast(gallivm->builder,
+ lp_build_emit_fetch(bld_base, inst, 0, c),
+ i32, ""),
+ store_ptr);
+
+ tl = LLVMBuildLoad(gallivm->builder, load_ptr0, "");
+ tl = LLVMBuildBitCast(gallivm->builder, tl, base->elem_type, "");
+
+ trbl = LLVMBuildLoad(gallivm->builder, load_ptr1, "");
+ trbl = LLVMBuildBitCast(gallivm->builder, trbl, base->elem_type, "");
+
+ result[c] = LLVMBuildFSub(gallivm->builder, trbl, tl, "");
+ }
+
+ emit_data->output[0] = lp_build_gather_values(gallivm, result, 4);
+}
+
+#endif /* HAVE_LLVM >= 0x0304 */
+
static const struct lp_build_tgsi_action tex_action = {
.fetch_args = tex_fetch_args,
.emit = build_tex_intrinsic,
.intr_name = "llvm.SI.sampleb."
};
+#if HAVE_LLVM >= 0x0304
+static const struct lp_build_tgsi_action txd_action = {
+ .fetch_args = tex_fetch_args,
+ .emit = build_tex_intrinsic,
+ .intr_name = "llvm.SI.sampled."
+};
+#endif
+
+static const struct lp_build_tgsi_action txf_action = {
+ .fetch_args = tex_fetch_args,
+ .emit = build_tex_intrinsic,
+ .intr_name = "llvm.SI.imageload."
+};
+
static const struct lp_build_tgsi_action txl_action = {
.fetch_args = tex_fetch_args,
.emit = build_tex_intrinsic,
.intr_name = "llvm.SI.samplel."
};
+static const struct lp_build_tgsi_action txq_action = {
+ .fetch_args = txq_fetch_args,
+ .emit = build_tgsi_intrinsic_nomem,
+ .intr_name = "llvm.SI.resinfo"
+};
+
static void create_meta_data(struct si_shader_context *si_shader_ctx)
{
struct gallivm_state *gallivm = si_shader_ctx->radeon_bld.soa.bld_base.base.gallivm;
static void create_function(struct si_shader_context *si_shader_ctx)
{
- struct gallivm_state *gallivm = si_shader_ctx->radeon_bld.soa.bld_base.base.gallivm;
+ struct lp_build_tgsi_context *bld_base = &si_shader_ctx->radeon_bld.soa.bld_base;
+ struct gallivm_state *gallivm = bld_base->base.gallivm;
LLVMTypeRef params[20], f32, i8, i32, v2i32, v3i32;
unsigned i;
SI_PARAM_START_INSTANCE);
LLVMAddAttribute(P, LLVMInRegAttribute);
}
+
+#if HAVE_LLVM >= 0x0304
+ if (bld_base->info->opcode_count[TGSI_OPCODE_DDX] > 0 ||
+ bld_base->info->opcode_count[TGSI_OPCODE_DDY] > 0)
+ si_shader_ctx->ddxy_lds =
+ LLVMAddGlobalInAddressSpace(gallivm->module,
+ LLVMArrayType(i32, 64),
+ "ddxy_lds",
+ LOCAL_ADDR_SPACE);
+#endif
}
static void preload_constants(struct si_shader_context *si_shader_ctx)
return;
/* Allocate space for the values */
- si_shader_ctx->resources = CALLOC(num_samplers, sizeof(LLVMValueRef));
+ si_shader_ctx->resources = CALLOC(NUM_SAMPLER_VIEWS, sizeof(LLVMValueRef));
si_shader_ctx->samplers = CALLOC(num_samplers, sizeof(LLVMValueRef));
res_ptr = LLVMGetParam(si_shader_ctx->radeon_bld.main_fn, SI_PARAM_RESOURCE);
/* Load the resources and samplers, we rely on the code sinking to do the rest */
for (i = 0; i < num_samplers; ++i) {
-
/* Resource */
offset = lp_build_const_int32(gallivm, i);
si_shader_ctx->resources[i] = build_indexed_load(si_shader_ctx, res_ptr, offset);
/* Sampler */
offset = lp_build_const_int32(gallivm, i);
si_shader_ctx->samplers[i] = build_indexed_load(si_shader_ctx, samp_ptr, offset);
+
+ /* FMASK resource */
+ if (info->is_msaa_sampler[i]) {
+ offset = lp_build_const_int32(gallivm, FMASK_TEX_OFFSET + i);
+ si_shader_ctx->resources[FMASK_TEX_OFFSET + i] =
+ build_indexed_load(si_shader_ctx, res_ptr, offset);
+ }
}
}
shader->num_sgprs = (G_00B028_SGPRS(value) + 1) * 8;
shader->num_vgprs = (G_00B028_VGPRS(value) + 1) * 4;
break;
+ case R_00B02C_SPI_SHADER_PGM_RSRC2_PS:
+ shader->lds_size = G_00B02C_EXTRA_LDS_SIZE(value);
+ break;
+ case R_00B84C_COMPUTE_PGM_RSRC2:
+ shader->lds_size = G_00B84C_LDS_SIZE(value);
+ break;
case R_0286CC_SPI_PS_INPUT_ENA:
shader->spi_ps_input_ena = value;
break;
bld_base = &si_shader_ctx.radeon_bld.soa.bld_base;
tgsi_scan_shader(sel->tokens, &shader_info);
+
shader->shader.uses_kill = shader_info.uses_kill;
shader->shader.uses_instanceid = shader_info.uses_instanceid;
bld_base->info = &shader_info;
bld_base->op_actions[TGSI_OPCODE_TEX] = tex_action;
bld_base->op_actions[TGSI_OPCODE_TXB] = txb_action;
+#if HAVE_LLVM >= 0x0304
+ bld_base->op_actions[TGSI_OPCODE_TXD] = txd_action;
+#endif
+ bld_base->op_actions[TGSI_OPCODE_TXF] = txf_action;
bld_base->op_actions[TGSI_OPCODE_TXL] = txl_action;
bld_base->op_actions[TGSI_OPCODE_TXP] = tex_action;
+ bld_base->op_actions[TGSI_OPCODE_TXQ] = txq_action;
+
+#if HAVE_LLVM >= 0x0304
+ bld_base->op_actions[TGSI_OPCODE_DDX].emit = si_llvm_emit_ddxy;
+ bld_base->op_actions[TGSI_OPCODE_DDY].emit = si_llvm_emit_ddxy;
+#endif
si_shader_ctx.radeon_bld.load_input = declare_input;
si_shader_ctx.radeon_bld.load_system_value = declare_system_value;
projects / mesa.git / blobdiff