radeonsi: remove r600_pipe_common::decompress_dcc

[mesa.git] / src / gallium / drivers / radeonsi / si_blit.c

diff --git a/src/gallium/drivers/radeonsi/si_blit.c b/src/gallium/drivers/radeonsi/si_blit.c
index e80bf5c24ef65aa8c160275b13881179f0dba3b6..27221714a40ea0591e3efa3f966bcfe1e234fe4c 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_blit.c
+++ b/src/gallium/drivers/radeonsi/si_blit.c
@@ -86,7 +86,7 @@ void si_blitter_end(struct pipe_context *ctx)
        /* Restore shader pointers because the VS blit shader changed all
         * non-global VS user SGPRs. */
        sctx->shader_pointers_dirty |= SI_DESCS_SHADER_MASK(VERTEX);
-       sctx->vertex_buffer_pointer_dirty = true;
+       sctx->vertex_buffer_pointer_dirty = sctx->vb_descriptors_buffer != NULL;
        si_mark_atom_dirty(sctx, &sctx->shader_pointers.atom);
 }
 
@@ -315,7 +315,7 @@ si_decompress_depth(struct si_context *sctx,
                levels_z = level_mask & tex->dirty_level_mask;
 
                if (levels_z) {
-                       if (r600_can_sample_zs(tex, false))
+                       if (si_can_sample_zs(tex, false))
                                inplace_planes |= PIPE_MASK_Z;
                        else
                                copy_planes |= PIPE_MASK_Z;
@@ -325,7 +325,7 @@ si_decompress_depth(struct si_context *sctx,
                levels_s = level_mask & tex->stencil_dirty_level_mask;
 
                if (levels_s) {
-                       if (r600_can_sample_zs(tex, true))
+                       if (si_can_sample_zs(tex, true))
                                inplace_planes |= PIPE_MASK_S;
                        else
                                copy_planes |= PIPE_MASK_S;
@@ -374,7 +374,7 @@ si_decompress_depth(struct si_context *sctx,
        }
 
        if (inplace_planes) {
-               bool has_htile = r600_htile_enabled(tex, first_level);
+               bool has_htile = si_htile_enabled(tex, first_level);
                bool tc_compat_htile = vi_tc_compat_htile_enabled(tex, first_level);
 
                /* Don't decompress if there is no HTILE or when HTILE is
@@ -713,6 +713,11 @@ static void si_check_render_feedback_resident_images(struct si_context *sctx)
 
 static void si_check_render_feedback(struct si_context *sctx)
 {
+       /* There is no render feedback if color writes are disabled.
+        * (e.g. a pixel shader with image stores)
+        */
+       if (!si_get_total_colormask(sctx))
+               return;
 
        if (!sctx->need_check_render_feedback)
                return;
@@ -772,7 +777,7 @@ void si_decompress_textures(struct si_context *sctx, unsigned shader_mask)
                return;
 
        /* Update the compressed_colortex_mask if necessary. */
-       compressed_colortex_counter = p_atomic_read(&sctx->screen->b.compressed_colortex_counter);
+       compressed_colortex_counter = p_atomic_read(&sctx->screen->compressed_colortex_counter);
        if (compressed_colortex_counter != sctx->b.last_compressed_colortex_counter) {
                sctx->b.last_compressed_colortex_counter = compressed_colortex_counter;
                si_update_needs_color_decompress_masks(sctx);
@@ -806,6 +811,14 @@ void si_decompress_textures(struct si_context *sctx, unsigned shader_mask)
                        si_decompress_resident_images(sctx);
        }
 
+       if (sctx->ps_uses_fbfetch) {
+               struct pipe_surface *cb0 = sctx->framebuffer.state.cbufs[0];
+               si_decompress_color_texture(sctx,
+                                           (struct r600_texture*)cb0->texture,
+                                           cb0->u.tex.first_layer,
+                                           cb0->u.tex.last_layer);
+       }
+
        si_check_render_feedback(sctx);
 }
 
@@ -1240,7 +1253,7 @@ static void si_blit(struct pipe_context *ctx,
                                  info->src.box.z,
                                  info->src.box.z + info->src.box.depth - 1);
 
-       if (sctx->screen->b.debug_flags & DBG(FORCE_DMA) &&
+       if (sctx->screen->debug_flags & DBG(FORCE_DMA) &&
            util_try_blit_via_copy_region(ctx, info))
                return;
 
@@ -1312,8 +1325,7 @@ static void si_flush_resource(struct pipe_context *ctx,
        }
 }
 
-static void si_decompress_dcc(struct pipe_context *ctx,
-                             struct r600_texture *rtex)
+void si_decompress_dcc(struct pipe_context *ctx, struct r600_texture *rtex)
 {
        if (!rtex->dcc_offset)
                return;
@@ -1323,73 +1335,11 @@ static void si_decompress_dcc(struct pipe_context *ctx,
                                 true);
 }
 
-static void si_pipe_clear_buffer(struct pipe_context *ctx,
-                                struct pipe_resource *dst,
-                                unsigned offset, unsigned size,
-                                const void *clear_value_ptr,
-                                int clear_value_size)
-{
-       struct si_context *sctx = (struct si_context*)ctx;
-       uint32_t dword_value;
-       unsigned i;
-
-       assert(offset % clear_value_size == 0);
-       assert(size % clear_value_size == 0);
-
-       if (clear_value_size > 4) {
-               const uint32_t *u32 = clear_value_ptr;
-               bool clear_dword_duplicated = true;
-
-               /* See if we can lower large fills to dword fills. */
-               for (i = 1; i < clear_value_size / 4; i++)
-                       if (u32[0] != u32[i]) {
-                               clear_dword_duplicated = false;
-                               break;
-                       }
-
-               if (!clear_dword_duplicated) {
-                       /* Use transform feedback for 64-bit, 96-bit, and
-                        * 128-bit fills.
-                        */
-                       union pipe_color_union clear_value;
-
-                       memcpy(&clear_value, clear_value_ptr, clear_value_size);
-                       si_blitter_begin(ctx, SI_DISABLE_RENDER_COND);
-                       util_blitter_clear_buffer(sctx->blitter, dst, offset,
-                                                 size, clear_value_size / 4,
-                                                 &clear_value);
-                       si_blitter_end(ctx);
-                       return;
-               }
-       }
-
-       /* Expand the clear value to a dword. */
-       switch (clear_value_size) {
-       case 1:
-               dword_value = *(uint8_t*)clear_value_ptr;
-               dword_value |= (dword_value << 8) |
-                              (dword_value << 16) |
-                              (dword_value << 24);
-               break;
-       case 2:
-               dword_value = *(uint16_t*)clear_value_ptr;
-               dword_value |= dword_value << 16;
-               break;
-       default:
-               dword_value = *(uint32_t*)clear_value_ptr;
-       }
-
-       sctx->b.clear_buffer(ctx, dst, offset, size, dword_value,
-                            R600_COHERENCY_SHADER);
-}
-
 void si_init_blit_functions(struct si_context *sctx)
 {
-       sctx->b.b.clear_buffer = si_pipe_clear_buffer;
        sctx->b.b.resource_copy_region = si_resource_copy_region;
        sctx->b.b.blit = si_blit;
        sctx->b.b.flush_resource = si_flush_resource;
        sctx->b.b.generate_mipmap = si_generate_mipmap;
        sctx->b.blit_decompress_depth = si_blit_decompress_depth;
-       sctx->b.decompress_dcc = si_decompress_dcc;
 }