radeonsi: move VS_STATE.LS_OUT_PATCH_SIZE a few bits higher to make space there

[mesa.git] / src / gallium / drivers / radeonsi / si_blit.c

diff --git a/src/gallium/drivers/radeonsi/si_blit.c b/src/gallium/drivers/radeonsi/si_blit.c
index 80dedf61e0abcdf77a14f064d9106dc4c123e439..5ac68406f7fb467f717a2d322f5de3e69b523866 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_blit.c
+++ b/src/gallium/drivers/radeonsi/si_blit.c
@@ -99,6 +99,7 @@ void si_blitter_end(struct si_context *sctx)
         * non-global VS user SGPRs. */
        sctx->shader_pointers_dirty |= SI_DESCS_SHADER_MASK(VERTEX);
        sctx->vertex_buffer_pointer_dirty = sctx->vb_descriptors_buffer != NULL;
+       sctx->vertex_buffer_user_sgprs_dirty = sctx->num_vertex_elements > 0;
        si_mark_atom_dirty(sctx, &sctx->atoms.s.shader_pointers);
 }
 
@@ -443,7 +444,7 @@ static void si_blit_decompress_color(struct si_context *sctx,
        if (!need_dcc_decompress)
                level_mask &= tex->dirty_level_mask;
        if (!level_mask)
-               return;
+               goto expand_fmask;
 
        if (unlikely(sctx->log))
                u_log_printf(sctx->log,
@@ -514,9 +515,10 @@ static void si_blit_decompress_color(struct si_context *sctx,
                                   vi_dcc_enabled(tex, first_level),
                                   tex->surface.u.gfx9.dcc.pipe_aligned);
 
-       if (need_fmask_expand && tex->surface.fmask_offset && tex->fmask_is_not_identity) {
+expand_fmask:
+       if (need_fmask_expand && tex->surface.fmask_offset && !tex->fmask_is_identity) {
                si_compute_expand_fmask(&sctx->b, &tex->buffer.b.b);
-               tex->fmask_is_not_identity = false;
+               tex->fmask_is_identity = true;
        }
 }