radeonsi: Set PIPE_SHADER_CAP_MAX_SHADER_IMAGES
[mesa.git] / src / gallium / drivers / radeonsi / si_blit.c
index d9c4f8fca1d1076da207bd694dfe562cd8340345..e0dbec5fb7905ea5545cf67e1cdd3f263f5d4bf3 100644 (file)
@@ -241,8 +241,9 @@ static void si_blit_decompress_depth_in_place(struct si_context *sctx,
        si_mark_atom_dirty(sctx, &sctx->db_render_state);
 }
 
-void si_flush_depth_textures(struct si_context *sctx,
-                            struct si_textures_info *textures)
+static void
+si_flush_depth_textures(struct si_context *sctx,
+                       struct si_textures_info *textures)
 {
        unsigned i;
        unsigned mask = textures->depth_texture_mask;
@@ -323,8 +324,9 @@ static void si_blit_decompress_color(struct pipe_context *ctx,
        }
 }
 
-void si_decompress_color_textures(struct si_context *sctx,
-                                 struct si_textures_info *textures)
+static void
+si_decompress_sampler_color_textures(struct si_context *sctx,
+                                    struct si_textures_info *textures)
 {
        unsigned i;
        unsigned mask = textures->compressed_colortex_mask;
@@ -348,6 +350,61 @@ void si_decompress_color_textures(struct si_context *sctx,
        }
 }
 
+static void
+si_decompress_image_color_textures(struct si_context *sctx,
+                                  struct si_images_info *images)
+{
+       unsigned i;
+       unsigned mask = images->compressed_colortex_mask;
+
+       while (mask) {
+               const struct pipe_image_view *view;
+               struct r600_texture *tex;
+
+               i = u_bit_scan(&mask);
+
+               view = &images->views[i];
+               assert(view->resource->target != PIPE_BUFFER);
+
+               tex = (struct r600_texture *)view->resource;
+               if (!tex->cmask.size && !tex->fmask.size && !tex->dcc_offset)
+                       continue;
+
+               si_blit_decompress_color(&sctx->b.b, tex,
+                                        view->u.tex.level, view->u.tex.level,
+                                        0, util_max_layer(&tex->resource.b.b, view->u.tex.level),
+                                        false);
+       }
+}
+
+void si_decompress_textures(struct si_context *sctx)
+{
+       unsigned compressed_colortex_counter;
+
+       if (sctx->blitter->running)
+               return;
+
+       /* Update the compressed_colortex_mask if necessary. */
+       compressed_colortex_counter = p_atomic_read(&sctx->screen->b.compressed_colortex_counter);
+       if (compressed_colortex_counter != sctx->b.last_compressed_colortex_counter) {
+               sctx->b.last_compressed_colortex_counter = compressed_colortex_counter;
+               si_update_compressed_colortex_masks(sctx);
+       }
+
+       /* Flush depth textures which need to be flushed. */
+       for (int i = 0; i < SI_NUM_SHADERS; i++) {
+               if (sctx->samplers[i].depth_texture_mask) {
+                       si_flush_depth_textures(sctx, &sctx->samplers[i]);
+               }
+               if (sctx->samplers[i].compressed_colortex_mask) {
+                       si_decompress_sampler_color_textures(sctx, &sctx->samplers[i]);
+               }
+               if (sctx->images[i].compressed_colortex_mask) {
+                       si_decompress_image_color_textures(sctx, &sctx->images[i]);
+               }
+       }
+}
+
 static void si_clear(struct pipe_context *ctx, unsigned buffers,
                     const union pipe_color_union *color,
                     double depth, unsigned stencil)