gallium/radeon: eliminate fast color clear before sharing
[mesa.git] / src / gallium / drivers / radeonsi / si_compute.c
index 6ef6eeec1786994cb3359402e52a8670abbdc679..1ec695ea0dff9d47d3c9b12e5ec6bb3e9fd6f04b 100644 (file)
@@ -45,12 +45,6 @@ struct si_compute {
 
        struct r600_resource *input_buffer;
        struct pipe_resource *global_buffers[MAX_GLOBAL_BUFFERS];
-
-#if HAVE_LLVM < 0x0306
-       unsigned num_kernels;
-       struct si_shader *kernels;
-       LLVMContextRef llvm_ctx;
-#endif
 };
 
 static void init_scratch_buffer(struct si_context *sctx, struct si_compute *program)
@@ -111,28 +105,6 @@ static void *si_create_compute_state(
        program->private_size = cso->req_private_mem;
        program->input_size = cso->req_input_mem;
 
-#if HAVE_LLVM < 0x0306
-       {
-               unsigned i;
-               program->llvm_ctx = LLVMContextCreate();
-               program->num_kernels = radeon_llvm_get_num_kernels(program->llvm_ctx,
-                                       code, header->num_bytes);
-               program->kernels = CALLOC(sizeof(struct si_shader),
-                                                        program->num_kernels);
-               for (i = 0; i < program->num_kernels; i++) {
-                       LLVMModuleRef mod = radeon_llvm_get_kernel_module(program->llvm_ctx, i,
-                                                        code, header->num_bytes);
-                       si_compile_llvm(sctx->screen, &program->kernels[i].binary,
-                                       &program->kernels[i].config, sctx->tm,
-                                       mod, &sctx->b.debug, TGSI_PROCESSOR_COMPUTE);
-                       si_shader_dump(sctx->screen, &program->kernels[i],
-                                      &sctx->b.debug, TGSI_PROCESSOR_COMPUTE);
-                       si_shader_binary_upload(sctx->screen, &program->kernels[i]);
-                       LLVMDisposeModule(mod);
-               }
-       }
-#else
-
        radeon_elf_read(code, header->num_bytes, &program->shader.binary);
 
        /* init_scratch_buffer patches the shader code with the scratch address,
@@ -143,10 +115,9 @@ static void *si_create_compute_state(
        si_shader_binary_read_config(&program->shader.binary,
                                     &program->shader.config, 0);
        si_shader_dump(sctx->screen, &program->shader, &sctx->b.debug,
-                      TGSI_PROCESSOR_COMPUTE);
+                      TGSI_PROCESSOR_COMPUTE, stderr);
        si_shader_binary_upload(sctx->screen, &program->shader);
 
-#endif
        program->input_buffer = si_resource_create_custom(sctx->b.b.screen,
                PIPE_USAGE_IMMUTABLE, program->input_size);
 
@@ -225,9 +196,7 @@ static unsigned compute_num_waves_for_scratch(
 }
 
 static void si_launch_grid(
-               struct pipe_context *ctx,
-               const uint *block_layout, const uint *grid_layout,
-               uint32_t pc, const void *input)
+               struct pipe_context *ctx, const struct pipe_grid_info *info)
 {
        struct si_context *sctx = (struct si_context*)ctx;
        struct radeon_winsys_cs *cs = sctx->b.gfx.cs;
@@ -246,11 +215,6 @@ static void si_launch_grid(
        unsigned lds_blocks;
        unsigned num_waves_for_scratch;
 
-#if HAVE_LLVM < 0x0306
-       shader = &program->kernels[pc];
-#endif
-
-
        radeon_emit(cs, PKT3(PKT3_CONTEXT_CONTROL, 1, 0) | PKT3_SHADER_TYPE_S(1));
        radeon_emit(cs, 0x80000000);
        radeon_emit(cs, 0x80000000);
@@ -265,10 +229,8 @@ static void si_launch_grid(
 
        pm4->compute_pkt = true;
 
-#if HAVE_LLVM >= 0x0306
        /* Read the config information */
-       si_shader_binary_read_config(&shader->binary, &shader->config, pc);
-#endif
+       si_shader_binary_read_config(&shader->binary, &shader->config, info->pc);
 
        /* Upload the kernel arguments */
 
@@ -278,15 +240,16 @@ static void si_launch_grid(
        kernel_args = sctx->b.ws->buffer_map(input_buffer->buf,
                        sctx->b.gfx.cs, PIPE_TRANSFER_WRITE);
        for (i = 0; i < 3; i++) {
-               kernel_args[i] = grid_layout[i];
-               kernel_args[i + 3] = grid_layout[i] * block_layout[i];
-               kernel_args[i + 6] = block_layout[i];
+               kernel_args[i] = info->grid[i];
+               kernel_args[i + 3] = info->grid[i] * info->block[i];
+               kernel_args[i + 6] = info->block[i];
        }
 
        num_waves_for_scratch = compute_num_waves_for_scratch(
-               &sctx->screen->b.info, block_layout, grid_layout);
+               &sctx->screen->b.info, info->block, info->grid);
 
-       memcpy(kernel_args + (num_work_size_bytes / 4), input, program->input_size);
+       memcpy(kernel_args + (num_work_size_bytes / 4), info->input,
+          program->input_size);
 
        if (shader->config.scratch_bytes_per_wave > 0) {
 
@@ -327,11 +290,11 @@ static void si_launch_grid(
        si_pm4_set_reg(pm4, R_00B818_COMPUTE_START_Z, 0);
 
        si_pm4_set_reg(pm4, R_00B81C_COMPUTE_NUM_THREAD_X,
-                               S_00B81C_NUM_THREAD_FULL(block_layout[0]));
+                               S_00B81C_NUM_THREAD_FULL(info->block[0]));
        si_pm4_set_reg(pm4, R_00B820_COMPUTE_NUM_THREAD_Y,
-                               S_00B820_NUM_THREAD_FULL(block_layout[1]));
+                               S_00B820_NUM_THREAD_FULL(info->block[1]));
        si_pm4_set_reg(pm4, R_00B824_COMPUTE_NUM_THREAD_Z,
-                               S_00B824_NUM_THREAD_FULL(block_layout[2]));
+                               S_00B824_NUM_THREAD_FULL(info->block[2]));
 
        /* Global buffers */
        for (i = 0; i < MAX_GLOBAL_BUFFERS; i++) {
@@ -359,10 +322,8 @@ static void si_launch_grid(
        }
 
        shader_va = shader->bo->gpu_address;
+       shader_va += info->pc;
 
-#if HAVE_LLVM >= 0x0306
-       shader_va += pc;
-#endif
        radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, shader->bo,
                                  RADEON_USAGE_READ, RADEON_PRIO_USER_SHADER);
        si_pm4_set_reg(pm4, R_00B830_COMPUTE_PGM_LO, shader_va >> 8);
@@ -413,9 +374,9 @@ static void si_launch_grid(
                ;
 
        si_pm4_cmd_begin(pm4, PKT3_DISPATCH_DIRECT);
-       si_pm4_cmd_add(pm4, grid_layout[0]); /* Thread groups DIM_X */
-       si_pm4_cmd_add(pm4, grid_layout[1]); /* Thread groups DIM_Y */
-       si_pm4_cmd_add(pm4, grid_layout[2]); /* Thread gropus DIM_Z */
+       si_pm4_cmd_add(pm4, info->grid[0]); /* Thread groups DIM_X */
+       si_pm4_cmd_add(pm4, info->grid[1]); /* Thread groups DIM_Y */
+       si_pm4_cmd_add(pm4, info->grid[2]); /* Thread gropus DIM_Z */
        si_pm4_cmd_add(pm4, 1); /* DISPATCH_INITIATOR */
         si_pm4_cmd_end(pm4, false);
 
@@ -447,29 +408,9 @@ static void si_delete_compute_state(struct pipe_context *ctx, void* state){
                return;
        }
 
-#if HAVE_LLVM < 0x0306
-       if (program->kernels) {
-               for (int i = 0; i < program->num_kernels; i++){
-                       if (program->kernels[i].bo){
-                               si_shader_destroy(&program->kernels[i]);
-                       }
-               }
-               FREE(program->kernels);
-       }
-
-       if (program->llvm_ctx){
-               LLVMContextDispose(program->llvm_ctx);
-       }
-#else
-       FREE(program->shader.binary.config);
-       FREE(program->shader.binary.rodata);
-       FREE(program->shader.binary.global_symbol_offsets);
        si_shader_destroy(&program->shader);
-#endif
-
        pipe_resource_reference(
                (struct pipe_resource **)&program->input_buffer, NULL);
-
        FREE(program);
 }