*/
#include "si_pipe.h"
+#include "si_compute.h"
#include "sid.h"
#include "gfx9d.h"
#include "sid_tables.h"
DEBUG_GET_ONCE_OPTION(replace_shaders, "RADEON_REPLACE_SHADERS", NULL)
static void si_dump_shader(struct si_screen *sscreen,
- struct si_shader_ctx_state *state, FILE *f)
+ enum pipe_shader_type processor,
+ const struct si_shader *shader, FILE *f)
{
- struct si_shader *current = state->current;
+ if (shader->shader_log)
+ fwrite(shader->shader_log, shader->shader_log_size, 1, f);
+ else
+ si_shader_dump(sscreen, shader, NULL, processor, f, false);
+}
+
+static void si_dump_gfx_shader(struct si_screen *sscreen,
+ const struct si_shader_ctx_state *state, FILE *f)
+{
+ const struct si_shader *current = state->current;
if (!state->cso || !current)
return;
- if (current->shader_log)
- fwrite(current->shader_log, current->shader_log_size, 1, f);
- else
- si_shader_dump(sscreen, state->current, NULL,
- state->cso->info.processor, f, false);
+ si_dump_shader(sscreen, state->cso->info.processor, current, f);
+}
+
+static void si_dump_compute_shader(struct si_screen *sscreen,
+ const struct si_cs_shader_state *state, FILE *f)
+{
+ if (!state->program || state->program != state->emitted_program)
+ return;
+
+ si_dump_shader(sscreen, PIPE_SHADER_COMPUTE, &state->program->shader, f);
}
/**
rtex = (struct r600_texture*)state->cbufs[i]->texture;
fprintf(f, COLOR_YELLOW "Color buffer %i:" COLOR_RESET "\n", i);
- r600_print_texture_info(rtex, f);
+ r600_print_texture_info(sctx->b.screen, rtex, f);
fprintf(f, "\n");
}
if (state->zsbuf) {
rtex = (struct r600_texture*)state->zsbuf->texture;
fprintf(f, COLOR_YELLOW "Depth-stencil buffer:" COLOR_RESET "\n");
- r600_print_texture_info(rtex, f);
+ r600_print_texture_info(sctx->b.screen, rtex, f);
fprintf(f, "\n");
}
}
}
static void si_dump_descriptors(struct si_context *sctx,
- struct si_shader_ctx_state *state,
- FILE *f)
+ enum pipe_shader_type processor,
+ const struct tgsi_shader_info *info, FILE *f)
{
- if (!state->cso || !state->current)
- return;
-
- unsigned type = state->cso->type;
- const struct tgsi_shader_info *info = &state->cso->info;
struct si_descriptors *descs =
&sctx->descriptors[SI_DESCS_FIRST_SHADER +
- type * SI_NUM_SHADER_DESCS];
+ processor * SI_NUM_SHADER_DESCS];
static const char *shader_name[] = {"VS", "PS", "GS", "TCS", "TES", "CS"};
static const char *elem_name[] = {
" - Sampler",
" - Image",
};
- unsigned num_elements[] = {
- util_last_bit(info->const_buffers_declared),
- util_last_bit(info->shader_buffers_declared),
- util_last_bit(info->samplers_declared),
- util_last_bit(info->images_declared),
+ unsigned enabled_slots[] = {
+ sctx->const_buffers[processor].enabled_mask,
+ sctx->shader_buffers[processor].enabled_mask,
+ sctx->samplers[processor].views.enabled_mask,
+ sctx->images[processor].enabled_mask,
+ };
+ unsigned required_slots[] = {
+ info ? info->const_buffers_declared : 0,
+ info ? info->shader_buffers_declared : 0,
+ info ? info->samplers_declared : 0,
+ info ? info->images_declared : 0,
};
- if (type == PIPE_SHADER_VERTEX) {
- si_dump_descriptor_list(&sctx->vertex_buffers, shader_name[type],
+ if (processor == PIPE_SHADER_VERTEX) {
+ assert(info); /* only CS may not have an info struct */
+
+ si_dump_descriptor_list(&sctx->vertex_buffers, shader_name[processor],
" - Vertex buffer", info->num_inputs, f);
}
for (unsigned i = 0; i < SI_NUM_SHADER_DESCS; ++i, ++descs)
- si_dump_descriptor_list(descs, shader_name[type], elem_name[i],
- num_elements[i], f);
+ si_dump_descriptor_list(descs, shader_name[processor], elem_name[i],
+ util_last_bit(enabled_slots[i] | required_slots[i]), f);
+}
+
+static void si_dump_gfx_descriptors(struct si_context *sctx,
+ const struct si_shader_ctx_state *state,
+ FILE *f)
+{
+ if (!state->cso || !state->current)
+ return;
+
+ si_dump_descriptors(sctx, state->cso->type, &state->cso->info, f);
+}
+
+static void si_dump_compute_descriptors(struct si_context *sctx, FILE *f)
+{
+ if (!sctx->cs_shader_state.program ||
+ sctx->cs_shader_state.program != sctx->cs_shader_state.emitted_program)
+ return;
+
+ si_dump_descriptors(sctx, PIPE_SHADER_COMPUTE, NULL, f);
}
struct si_shader_inst {
si_add_split_disasm(shader->prolog->binary.disasm_string,
start_addr, &num_inst, instructions);
}
+ if (shader->previous_stage) {
+ si_add_split_disasm(shader->previous_stage->binary.disasm_string,
+ start_addr, &num_inst, instructions);
+ }
+ if (shader->prolog2) {
+ si_add_split_disasm(shader->prolog2->binary.disasm_string,
+ start_addr, &num_inst, instructions);
+ }
si_add_split_disasm(shader->binary.disasm_string,
start_addr, &num_inst, instructions);
if (shader->epilog) {
si_dump_framebuffer(sctx, f);
if (flags & PIPE_DUMP_CURRENT_SHADERS) {
- si_dump_shader(sctx->screen, &sctx->vs_shader, f);
- si_dump_shader(sctx->screen, &sctx->tcs_shader, f);
- si_dump_shader(sctx->screen, &sctx->tes_shader, f);
- si_dump_shader(sctx->screen, &sctx->gs_shader, f);
- si_dump_shader(sctx->screen, &sctx->ps_shader, f);
+ si_dump_gfx_shader(sctx->screen, &sctx->vs_shader, f);
+ si_dump_gfx_shader(sctx->screen, &sctx->tcs_shader, f);
+ si_dump_gfx_shader(sctx->screen, &sctx->tes_shader, f);
+ si_dump_gfx_shader(sctx->screen, &sctx->gs_shader, f);
+ si_dump_gfx_shader(sctx->screen, &sctx->ps_shader, f);
+ si_dump_compute_shader(sctx->screen, &sctx->cs_shader_state, f);
if (flags & PIPE_DUMP_DEVICE_STATUS_REGISTERS) {
si_dump_annotated_shaders(sctx, f);
si_dump_descriptor_list(&sctx->descriptors[SI_DESCS_RW_BUFFERS],
"", "RW buffers", SI_NUM_RW_BUFFERS, f);
- si_dump_descriptors(sctx, &sctx->vs_shader, f);
- si_dump_descriptors(sctx, &sctx->tcs_shader, f);
- si_dump_descriptors(sctx, &sctx->tes_shader, f);
- si_dump_descriptors(sctx, &sctx->gs_shader, f);
- si_dump_descriptors(sctx, &sctx->ps_shader, f);
+ si_dump_gfx_descriptors(sctx, &sctx->vs_shader, f);
+ si_dump_gfx_descriptors(sctx, &sctx->tcs_shader, f);
+ si_dump_gfx_descriptors(sctx, &sctx->tes_shader, f);
+ si_dump_gfx_descriptors(sctx, &sctx->gs_shader, f);
+ si_dump_gfx_descriptors(sctx, &sctx->ps_shader, f);
+ si_dump_compute_descriptors(sctx, f);
}
if (flags & PIPE_DUMP_LAST_COMMAND_BUFFER) {
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