radeonsi: set descriptor dirty mask on shader buffer unbind

[mesa.git] / src / gallium / drivers / radeonsi / si_descriptors.c

diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index d66996aa657c4f28d7c7d49f5f66283eb1e2d187..f48ddb77aabe672ec38796983be4c61c6bc120a0 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -140,7 +140,7 @@ static bool si_ce_upload(struct si_context *sctx, unsigned ce_offset, unsigned s
                         unsigned *out_offset, struct r600_resource **out_buf) {
        uint64_t va;
 
-       u_suballocator_alloc(sctx->ce_suballocator, size, out_offset,
+       u_suballocator_alloc(sctx->ce_suballocator, size, 64, out_offset,
                             (struct pipe_resource**)out_buf);
        if (!out_buf)
                        return false;
@@ -602,7 +602,7 @@ static void si_set_shader_image(struct si_context *ctx,
                                           view->u.tex.last_layer,
                                           width, height, depth,
                                           desc, NULL);
-               si_set_mutable_tex_desc_fields(tex, tex->surface.level, level,
+               si_set_mutable_tex_desc_fields(tex, &tex->surface.level[level], level,
                                               util_format_get_blockwidth(view->format),
                                               false, desc);
        }
@@ -968,6 +968,7 @@ static void si_set_shader_buffers(struct pipe_context *ctx, unsigned shader,
                        pipe_resource_reference(&buffers->buffers[slot], NULL);
                        memset(desc, 0, sizeof(uint32_t) * 4);
                        buffers->desc.enabled_mask &= ~(1u << slot);
+                       buffers->desc.dirty_mask |= 1u << slot;
                        continue;
                }