return "AMD";
}
-static const char *si_get_marketing_name(struct radeon_winsys *ws)
-{
- if (!ws->get_chip_name)
- return NULL;
- return ws->get_chip_name(ws);
-}
-
static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
{
struct si_screen *sscreen = (struct si_screen *)pscreen;
case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
- case PIPE_CAP_SM3:
+ case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
+ case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:
+ case PIPE_CAP_VERTEX_SHADER_SATURATE:
case PIPE_CAP_SEAMLESS_CUBE_MAP:
case PIPE_CAP_PRIMITIVE_RESTART:
case PIPE_CAP_CONDITIONAL_RENDER:
case PIPE_CAP_QUERY_TIMESTAMP:
case PIPE_CAP_QUERY_TIME_ELAPSED:
case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
- case PIPE_CAP_QUERY_SO_OVERFLOW:
case PIPE_CAP_MEMOBJ:
case PIPE_CAP_LOAD_CONSTBUF:
case PIPE_CAP_INT64:
case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
case PIPE_CAP_TGSI_BALLOT:
case PIPE_CAP_TGSI_VOTE:
- case PIPE_CAP_TGSI_FS_FBFETCH:
+ case PIPE_CAP_FBFETCH:
case PIPE_CAP_COMPUTE_GRID_INFO_LAST_BLOCK:
+ case PIPE_CAP_IMAGE_LOAD_FORMATTED:
+ case PIPE_CAP_PREFER_COMPUTE_FOR_MULTIMEDIA:
+ case PIPE_CAP_TGSI_DIV:
return 1;
+ case PIPE_CAP_QUERY_SO_OVERFLOW:
+ return !sscreen->use_ngg_streamout;
+
+ case PIPE_CAP_POST_DEPTH_COVERAGE:
+ return sscreen->info.chip_class >= GFX10;
+
+ case PIPE_CAP_GRAPHICS:
+ return sscreen->info.has_graphics;
+
case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
return !SI_BIG_ENDIAN && sscreen->info.has_userptr;
case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
- return sscreen->info.has_gpu_reset_status_query ||
- sscreen->info.has_gpu_reset_counter_query;
+ return sscreen->info.has_gpu_reset_status_query;
case PIPE_CAP_TEXTURE_MULTISAMPLE:
return sscreen->info.has_2d_tiling;
case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
- return !sscreen->info.has_unaligned_shader_loads;
+ return HAVE_LLVM < 0x0900 && !sscreen->info.has_unaligned_shader_loads;
case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
return sscreen->info.has_sparse_vm_mappings ?
RADEON_SPARSE_PAGE_SIZE : 0;
case PIPE_CAP_PACKED_UNIFORMS:
- if (sscreen->debug_flags & DBG(NIR))
+ case PIPE_CAP_SHADER_SAMPLES_IDENTICAL:
+ if (sscreen->options.enable_nir)
return 1;
return 0;
+ case PIPE_CAP_PREFER_IMM_ARRAYS_AS_CONSTBUF:
+ if (sscreen->options.enable_nir)
+ return 0;
+ return 1;
+
/* Unsupported features. */
case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
case PIPE_CAP_TGSI_MUL_ZERO_WINS:
case PIPE_CAP_UMA:
case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
- case PIPE_CAP_POST_DEPTH_COVERAGE:
case PIPE_CAP_TILE_RASTER_ORDER:
case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
return 32;
case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
- return sscreen->info.chip_class <= VI ?
+ return sscreen->info.chip_class <= GFX8 ?
PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_R600 : 0;
/* Stream output. */
/* Geometry shader output. */
case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
- return 1024;
+ /* gfx9 has to report 256 to make piglit/gs-max-output pass.
+ * gfx8 and earlier can do 1024.
+ */
+ return 256;
case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
return 4095;
case PIPE_CAP_MAX_GS_INVOCATIONS:
return 2048;
/* Texturing. */
- case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
+ case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
+ return 16384;
case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
return 15; /* 16384 */
case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
+ if (sscreen->info.chip_class >= GFX10)
+ return 14;
/* textures support 8192, but layered rendering supports 2048 */
return 12;
case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
+ if (sscreen->info.chip_class >= GFX10)
+ return 8192;
/* textures support 8192, but layered rendering supports 2048 */
return 2048;
return sscreen->info.pci_dev;
case PIPE_CAP_PCI_FUNCTION:
return sscreen->info.pci_func;
+ case PIPE_CAP_TGSI_ATOMINC_WRAP:
+ return HAVE_LLVM >= 0x1000;
default:
return u_pipe_screen_get_param_defaults(pscreen, param);
case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
return SI_NUM_IMAGES;
case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
- if (sscreen->debug_flags & DBG(NIR))
+ if (sscreen->options.enable_nir)
return 0;
return 32;
case PIPE_SHADER_CAP_PREFERRED_IR:
- if (sscreen->debug_flags & DBG(NIR))
+ if (sscreen->options.enable_nir)
return PIPE_SHADER_IR_NIR;
return PIPE_SHADER_IR_TGSI;
case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
.lower_flrp64 = true,
.lower_fsat = true,
.lower_fdiv = true,
+ .lower_bitfield_insert_to_bitfield_select = true,
+ .lower_bitfield_extract = true,
.lower_sub = true,
.lower_ffma = true,
- .lower_pack_snorm_2x16 = true,
+ .lower_fmod = true,
.lower_pack_snorm_4x8 = true,
- .lower_pack_unorm_2x16 = true,
.lower_pack_unorm_4x8 = true,
.lower_unpack_snorm_2x16 = true,
.lower_unpack_snorm_4x8 = true,
.lower_unpack_unorm_4x8 = true,
.lower_extract_byte = true,
.lower_extract_word = true,
+ .lower_rotate = true,
+ .optimize_sample_mask_in = true,
.max_unroll_iterations = 32,
- .native_integers = true,
+ .use_interpolated_input_intrinsics = true,
};
static const void *
case PIPE_VIDEO_CAP_SUPPORTED:
return (codec == PIPE_VIDEO_FORMAT_MPEG4_AVC &&
(si_vce_is_fw_version_supported(sscreen) ||
- sscreen->info.family == CHIP_RAVEN ||
- sscreen->info.family == CHIP_RAVEN2)) ||
+ sscreen->info.family >= CHIP_RAVEN)) ||
(profile == PIPE_VIDEO_PROFILE_HEVC_MAIN &&
- (sscreen->info.family == CHIP_RAVEN ||
- sscreen->info.family == CHIP_RAVEN2 ||
- si_radeon_uvd_enc_supported(sscreen)));
+ (sscreen->info.family >= CHIP_RAVEN ||
+ si_radeon_uvd_enc_supported(sscreen)));
case PIPE_VIDEO_CAP_NPOT_TEXTURES:
return 1;
case PIPE_VIDEO_CAP_MAX_WIDTH:
return profile == PIPE_VIDEO_PROFILE_HEVC_MAIN;
return false;
case PIPE_VIDEO_FORMAT_JPEG:
- if (sscreen->info.family == CHIP_RAVEN ||
- sscreen->info.family == CHIP_RAVEN2)
+ if (sscreen->info.family >= CHIP_RAVEN)
return true;
if (sscreen->info.family < CHIP_CARRIZO || sscreen->info.family >= CHIP_VEGA10)
return false;
- if (!(sscreen->info.drm_major == 3 && sscreen->info.drm_minor >= 19)) {
+ if (!(sscreen->info.is_amdgpu && sscreen->info.drm_minor >= 19)) {
RVID_ERR("No MJPEG support for the kernel version\n");
return false;
}
}
}
-static boolean si_vid_is_format_supported(struct pipe_screen *screen,
- enum pipe_format format,
- enum pipe_video_profile profile,
- enum pipe_video_entrypoint entrypoint)
+static bool si_vid_is_format_supported(struct pipe_screen *screen,
+ enum pipe_format format,
+ enum pipe_video_profile profile,
+ enum pipe_video_entrypoint entrypoint)
{
/* HEVC 10 bit decoding should use P016 instead of NV12 if possible */
if (profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10)
return (format == PIPE_FORMAT_NV12) ||
(format == PIPE_FORMAT_P016);
+ /* Vp9 profile 2 supports 10 bit decoding using P016 */
+ if (profile == PIPE_VIDEO_PROFILE_VP9_PROFILE2)
+ return format == PIPE_FORMAT_P016;
+
+
/* we can only handle this one with UVD */
if (profile != PIPE_VIDEO_PROFILE_UNKNOWN)
return format == PIPE_FORMAT_NV12;
case PIPE_COMPUTE_CAP_SUBGROUP_SIZE:
if (ret) {
uint32_t *subgroup_size = ret;
- *subgroup_size = 64;
+ *subgroup_size = sscreen->compute_wave_size;
}
return sizeof(uint32_t);
case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK:
info->device_memory_evicted =
ws->query_value(ws, RADEON_NUM_BYTES_MOVED) / 1024;
- if (sscreen->info.drm_major == 3 && sscreen->info.drm_minor >= 4)
+ if (sscreen->info.is_amdgpu && sscreen->info.drm_minor >= 4)
info->nr_device_memory_evictions =
ws->query_value(ws, RADEON_NUM_EVICTIONS);
else
static void si_init_renderer_string(struct si_screen *sscreen)
{
- struct radeon_winsys *ws = sscreen->ws;
char first_name[256], second_name[32] = {}, kernel_version[128] = {};
struct utsname uname_data;
- const char *marketing_name = si_get_marketing_name(ws);
-
- if (marketing_name) {
- snprintf(first_name, sizeof(first_name), "%s", marketing_name);
+ if (sscreen->info.marketing_name) {
+ snprintf(first_name, sizeof(first_name), "%s",
+ sscreen->info.marketing_name);
snprintf(second_name, sizeof(second_name), "%s, ",
sscreen->info.name);
} else {
projects / mesa.git / blobdiff