radeon/llvm: Use amdgcn triple for SI+ on LLVM >= 3.6

[mesa.git] / src / gallium / drivers / radeonsi / si_pipe.c

diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 592069746d970c78605b79fa3f2523c38a8bec31..02c02ab07d314234112f136f388bfac24cebb021 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -25,12 +25,14 @@
 #include "si_public.h"
 #include "sid.h"
 
+#include "radeon/radeon_llvm_emit.h"
 #include "radeon/radeon_uvd.h"
-#include "util/u_blitter.h"
 #include "util/u_memory.h"
-#include "util/u_simple_shaders.h"
 #include "vl/vl_decoder.h"
 
+#include <llvm-c/Target.h>
+#include <llvm-c/TargetMachine.h>
+
 /*
  * pipe_context
  */
@@ -40,6 +42,8 @@ static void si_destroy_context(struct pipe_context *context)
 
        si_release_all_descriptors(sctx);
 
+       pipe_resource_reference(&sctx->esgs_ring, NULL);
+       pipe_resource_reference(&sctx->gsvs_ring, NULL);
        pipe_resource_reference(&sctx->null_const_buf.buffer, NULL);
        r600_resource_reference(&sctx->border_color_table, NULL);
 
@@ -50,12 +54,7 @@ static void si_destroy_context(struct pipe_context *context)
        if (sctx->dummy_pixel_shader) {
                sctx->b.b.delete_fs_state(&sctx->b.b, sctx->dummy_pixel_shader);
        }
-       for (int i = 0; i < 8; i++) {
-               sctx->b.b.delete_depth_stencil_alpha_state(&sctx->b.b, sctx->custom_dsa_flush_depth_stencil[i]);
-               sctx->b.b.delete_depth_stencil_alpha_state(&sctx->b.b, sctx->custom_dsa_flush_depth[i]);
-               sctx->b.b.delete_depth_stencil_alpha_state(&sctx->b.b, sctx->custom_dsa_flush_stencil[i]);
-       }
-       sctx->b.b.delete_depth_stencil_alpha_state(&sctx->b.b, sctx->custom_dsa_flush_inplace);
+       sctx->b.b.delete_depth_stencil_alpha_state(&sctx->b.b, sctx->custom_dsa_flush);
        sctx->b.b.delete_blend_state(&sctx->b.b, sctx->custom_blend_resolve);
        sctx->b.b.delete_blend_state(&sctx->b.b, sctx->custom_blend_decompress);
        sctx->b.b.delete_blend_state(&sctx->b.b, sctx->custom_blend_fastclear);
@@ -99,7 +98,8 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, void *
        }
 
        sctx->b.rings.gfx.cs = ws->cs_create(ws, RING_GFX, si_context_gfx_flush,
-                                            sctx, NULL);
+                                            sctx, sscreen->b.trace_bo ?
+                                               sscreen->b.trace_bo->cs_buf : NULL);
        sctx->b.rings.gfx.flush = si_context_gfx_flush;
 
        si_init_all_descriptors(sctx);
@@ -118,6 +118,7 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, void *
        case SI:
        case CIK:
                si_init_state_functions(sctx);
+               si_init_shader_functions(sctx);
                si_init_config(sctx);
                break;
        default:
@@ -125,15 +126,13 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, void *
                goto fail;
        }
 
+       if (sscreen->b.debug_flags & DBG_FORCE_DMA)
+               sctx->b.b.resource_copy_region = sctx->b.dma_copy;
+
        sctx->blitter = util_blitter_create(&sctx->b.b);
        if (sctx->blitter == NULL)
                goto fail;
-
-       sctx->dummy_pixel_shader =
-               util_make_fragment_cloneinput_shader(&sctx->b.b, 0,
-                                                    TGSI_SEMANTIC_GENERIC,
-                                                    TGSI_INTERPOLATE_CONSTANT);
-       sctx->b.b.bind_fs_state(&sctx->b.b, sctx->dummy_pixel_shader);
+       sctx->blitter->draw_rectangle = r600_draw_rectangle;
 
        /* these must be last */
        si_begin_new_cs(sctx);
@@ -189,6 +188,7 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
        case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
        case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
+       case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
        case PIPE_CAP_SM3:
        case PIPE_CAP_SEAMLESS_CUBE_MAP:
        case PIPE_CAP_PRIMITIVE_RESTART:
@@ -216,6 +216,8 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_CUBE_MAP_ARRAY:
        case PIPE_CAP_SAMPLE_SHADING:
        case PIPE_CAP_DRAW_INDIRECT:
+       case PIPE_CAP_CLIP_HALFZ:
+       case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
                return 1;
 
        case PIPE_CAP_TEXTURE_MULTISAMPLE:
@@ -244,7 +246,6 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 
        /* Unsupported features. */
        case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
-       case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
        case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
        case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
        case PIPE_CAP_VERTEX_COLOR_CLAMPED:
@@ -253,7 +254,10 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_TGSI_TEXCOORD:
        case PIPE_CAP_FAKE_SW_MSAA:
        case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
-       case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
+       case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
+       case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
+       case PIPE_CAP_SAMPLER_VIEW_TARGET:
+       case PIPE_CAP_VERTEXID_NOBASE:
                return 0;
 
        case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
@@ -276,6 +280,9 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_MAX_VERTEX_STREAMS:
                return 1;
 
+       case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
+               return 2048;
+
        /* Texturing. */
        case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
        case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
@@ -309,6 +316,17 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 
        case PIPE_CAP_ENDIANNESS:
                return PIPE_ENDIAN_LITTLE;
+
+       case PIPE_CAP_VENDOR_ID:
+               return 0x1002;
+       case PIPE_CAP_DEVICE_ID:
+               return sscreen->b.info.pci_id;
+       case PIPE_CAP_ACCELERATED:
+               return 1;
+       case PIPE_CAP_VIDEO_MEMORY:
+               return sscreen->b.info.vram_size >> 20;
+       case PIPE_CAP_UMA:
+               return 0;
        }
        return 0;
 }
@@ -324,10 +342,21 @@ static int si_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enu
        case PIPE_SHADER_COMPUTE:
                switch (param) {
                case PIPE_SHADER_CAP_PREFERRED_IR:
+#if HAVE_LLVM < 0x0306
                        return PIPE_SHADER_IR_LLVM;
+#else
+                       return PIPE_SHADER_IR_NATIVE;
+#endif
                case PIPE_SHADER_CAP_DOUBLES:
                        return 0; /* XXX: Enable doubles once the compiler can
                                     handle them. */
+               case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE: {
+                       uint64_t max_const_buffer_size;
+                       pscreen->get_compute_param(pscreen,
+                               PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE,
+                               &max_const_buffer_size);
+                       return max_const_buffer_size;
+               }
                default:
                        return 0;
                }
@@ -346,6 +375,8 @@ static int si_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enu
                return 32;
        case PIPE_SHADER_CAP_MAX_INPUTS:
                return shader == PIPE_SHADER_VERTEX ? SI_NUM_VERTEX_BUFFERS : 32;
+       case PIPE_SHADER_CAP_MAX_OUTPUTS:
+               return shader == PIPE_SHADER_FRAGMENT ? 8 : 32;
        case PIPE_SHADER_CAP_MAX_TEMPS:
                return 256; /* Max native temporaries. */
        case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
@@ -393,6 +424,10 @@ static void si_destroy_screen(struct pipe_screen* pscreen)
                return;
 
        r600_destroy_common_screen(&sscreen->b);
+
+#if HAVE_LLVM >= 0x0306
+       LLVMDisposeTargetMachine(sscreen->tm);
+#endif
 }
 
 #define SI_TILE_MODE_COLOR_2D_8BPP  14
@@ -449,6 +484,12 @@ static bool si_initialize_pipe_config(struct si_screen *sscreen)
 struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws)
 {
        struct si_screen *sscreen = CALLOC_STRUCT(si_screen);
+       LLVMTargetRef r600_target;
+#if HAVE_LLVM >= 0x0306
+       const char *triple = "amdgcn--";
+#else
+       const char *triple = "r600--";
+#endif
        if (sscreen == NULL) {
                return NULL;
        }
@@ -476,5 +517,13 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws)
        /* Create the auxiliary context. This must be done last. */
        sscreen->b.aux_context = sscreen->b.b.context_create(&sscreen->b.b, NULL);
 
+#if HAVE_LLVM >= 0x0306
+       /* Initialize LLVM TargetMachine */
+       r600_target = radeon_llvm_get_r600_target(triple);
+       sscreen->tm = LLVMCreateTargetMachine(r600_target, triple,
+                               r600_get_llvm_processor_name(sscreen->b.family),
+                               "+DumpCode", LLVMCodeGenLevelDefault, LLVMRelocDefault,
+                               LLVMCodeModelDefault);
+#endif
        return &sscreen->b.b;
 }