#include "ac_llvm_util.h"
#include "radeon/radeon_uvd.h"
-#include "gallivm/lp_bld_misc.h"
#include "util/disk_cache.h"
#include "util/u_log.h"
#include "util/u_memory.h"
{ "preoptir", DBG(PREOPT_IR), "Print the LLVM IR before initial optimizations" },
/* Shader compiler options the shader cache should be aware of: */
- { "unsafemath", DBG(UNSAFE_MATH), "Enable unsafe math shader optimizations" },
{ "sisched", DBG(SI_SCHED), "Enable LLVM SI Machine Instruction Scheduler." },
{ "gisel", DBG(GISEL), "Enable LLVM global instruction selector." },
{ "w32ge", DBG(W32_GE), "Use Wave32 for vertex, tessellation, and geometry shaders." },
{ "zerovram", DBG(ZERO_VRAM), "Clear VRAM allocations." },
/* 3D engine options: */
+ { "nogfx", DBG(NO_GFX), "Disable graphics. Only multimedia compute paths can be used." },
{ "alwayspd", DBG(ALWAYS_PD), "Always enable the primitive discard compute shader." },
{ "pd", DBG(PD), "Enable the primitive discard compute shader for large draw calls." },
{ "nopd", DBG(NO_PD), "Disable the primitive discard compute shader." },
static struct pipe_context *si_create_context(struct pipe_screen *screen,
unsigned flags)
{
- struct si_context *sctx = CALLOC_STRUCT(si_context);
struct si_screen* sscreen = (struct si_screen *)screen;
+
+ /* Don't create a context if it's not compute-only and hw is compute-only. */
+ if (!sscreen->info.has_graphics &&
+ !(flags & PIPE_CONTEXT_COMPUTE_ONLY))
+ return NULL;
+
+ struct si_context *sctx = CALLOC_STRUCT(si_context);
struct radeon_winsys *ws = sscreen->ws;
int shader, i;
bool stop_exec_on_failure = (flags & PIPE_CONTEXT_LOSE_CONTEXT_ON_RESET) != 0;
if (!sctx->border_color_map)
goto fail;
- sctx->ngg = sctx->chip_class >= GFX10;
+ sctx->ngg = sscreen->use_ngg;
/* Initialize context functions used by graphics and compute. */
if (sctx->chip_class >= GFX10)
si_init_fence_functions(sctx);
si_init_query_functions(sctx);
si_init_state_compute_functions(sctx);
+ si_init_context_texture_functions(sctx);
/* Initialize graphics-only context functions. */
if (sctx->has_graphics) {
- si_init_context_texture_functions(sctx);
if (sctx->chip_class >= GFX10)
gfx10_init_query(sctx);
si_init_msaa_functions(sctx);
goto fail;
sctx->blitter->skip_viewport_restore = true;
+ /* Some states are expected to be always non-NULL. */
+ sctx->noop_blend = util_blitter_get_noop_blend_state(sctx->blitter);
+ sctx->queued.named.blend = sctx->noop_blend;
+
+ sctx->noop_dsa = util_blitter_get_noop_dsa_state(sctx->blitter);
+ sctx->queued.named.dsa = sctx->noop_dsa;
+
+ sctx->discard_rasterizer_state =
+ util_blitter_get_discard_rasterizer_state(sctx->blitter);
+ sctx->queued.named.rasterizer = sctx->discard_rasterizer_state;
+
si_init_draw_functions(sctx);
si_initialize_prim_discard_tunables(sctx);
}
util_queue_destroy(&sscreen->shader_compiler_queue);
util_queue_destroy(&sscreen->shader_compiler_queue_low_priority);
+ /* Release the reference on glsl types of the compiler threads. */
+ glsl_type_singleton_decref();
+
for (i = 0; i < ARRAY_SIZE(sscreen->compiler); i++)
si_destroy_compiler(&sscreen->compiler[i]);
#define ALL_FLAGS (DBG(FS_CORRECT_DERIVS_AFTER_KILL) | \
DBG(SI_SCHED) | \
DBG(GISEL) | \
- DBG(UNSAFE_MATH) | \
DBG(W32_GE) | \
DBG(W32_PS) | \
DBG(W32_CS) | \
sscreen->debug_flags |= debug_get_flags_option("AMD_DEBUG",
debug_options, 0);
+ if (sscreen->debug_flags & DBG(NO_GFX))
+ sscreen->info.has_graphics = false;
+
/* Set functions first. */
sscreen->b.context_create = si_pipe_create_context;
sscreen->b.destroy = si_destroy_screen;
num_comp_lo_threads = MIN2(num_comp_lo_threads,
ARRAY_SIZE(sscreen->compiler_lowp));
+ /* Take a reference on the glsl types for the compiler threads. */
+ glsl_type_singleton_init_or_ref();
+
if (!util_queue_init(&sscreen->shader_compiler_queue, "sh",
64, num_comp_hi_threads,
UTIL_QUEUE_INIT_RESIZE_IF_FULL |
UTIL_QUEUE_INIT_SET_FULL_THREAD_AFFINITY)) {
si_destroy_shader_cache(sscreen);
FREE(sscreen);
+ glsl_type_singleton_decref();
return NULL;
}
UTIL_QUEUE_INIT_USE_MINIMUM_PRIORITY)) {
si_destroy_shader_cache(sscreen);
FREE(sscreen);
+ glsl_type_singleton_decref();
return NULL;
}
}
sscreen->tess_factor_ring_size = 32768 * sscreen->info.max_se;
- assert(((sscreen->tess_factor_ring_size / 4) & C_030938_SIZE) == 0);
sscreen->tess_offchip_ring_size = max_offchip_buffers *
sscreen->tess_offchip_block_dw_size * 4;
sscreen->has_ls_vgpr_init_bug = sscreen->info.family == CHIP_VEGA10 ||
sscreen->info.family == CHIP_RAVEN;
sscreen->has_dcc_constant_encode = sscreen->info.family == CHIP_RAVEN2 ||
+ sscreen->info.family == CHIP_RENOIR ||
sscreen->info.chip_class >= GFX10;
+ sscreen->use_ngg = sscreen->info.chip_class >= GFX10;
+ sscreen->use_ngg_streamout = sscreen->info.chip_class >= GFX10;
/* Only enable primitive binning on APUs by default. */
if (sscreen->info.chip_class >= GFX10) {
(sscreen->info.family == CHIP_STONEY ||
sscreen->info.family == CHIP_VEGA12 ||
sscreen->info.family == CHIP_RAVEN ||
- sscreen->info.family == CHIP_RAVEN2);
+ sscreen->info.family == CHIP_RAVEN2 ||
+ sscreen->info.family == CHIP_RENOIR);
}
sscreen->dcc_msaa_allowed =
}
/* Create the auxiliary context. This must be done last. */
- sscreen->aux_context = si_create_context(
- &sscreen->b, sscreen->options.aux_debug ? PIPE_CONTEXT_DEBUG : 0);
+ sscreen->aux_context = si_create_context(&sscreen->b,
+ (sscreen->options.aux_debug ? PIPE_CONTEXT_DEBUG : 0) |
+ (sscreen->info.has_graphics ? 0 : PIPE_CONTEXT_COMPUTE_ONLY));
if (sscreen->options.aux_debug) {
struct u_log_context *log = CALLOC_STRUCT(u_log_context);
u_log_context_init(log);