disk_cache_format_hex_id(cache_id, sha1, 20 * 2);
/* These flags affect shader compilation. */
- #define ALL_FLAGS (DBG(FS_CORRECT_DERIVS_AFTER_KILL) | \
- DBG(SI_SCHED) | \
- DBG(GISEL) | \
- DBG(W32_GE) | \
- DBG(W32_PS) | \
- DBG(W32_CS) | \
- DBG(W64_GE) | \
- DBG(W64_PS) | \
- DBG(W64_CS))
+ #define ALL_FLAGS (DBG(SI_SCHED) | DBG(GISEL))
uint64_t shader_debug_flags = sscreen->debug_flags & ALL_FLAGS;
- if (sscreen->options.enable_nir) {
- STATIC_ASSERT((ALL_FLAGS & (1u << 31)) == 0);
- shader_debug_flags |= 1u << 31;
- }
-
/* Add the high bits of 32-bit addresses, which affects
* how 32-bit addresses are expanded to 64 bits.
*/
sscreen->info.pfp_fw_version >= 79 &&
sscreen->info.me_fw_version >= 142);
- sscreen->has_out_of_order_rast = sscreen->info.chip_class >= GFX8 &&
- sscreen->info.max_se >= 2 &&
+ sscreen->has_out_of_order_rast = sscreen->info.has_out_of_order_rast &&
!(sscreen->debug_flags & DBG(NO_OUT_OF_ORDER));
sscreen->assume_no_z_fights =
driQueryOptionb(config->options, "radeonsi_assume_no_z_fights");
#include "si_debug_options.h"
}
- sscreen->has_gfx9_scissor_bug = sscreen->info.family == CHIP_VEGA10 ||
- sscreen->info.family == CHIP_RAVEN;
- sscreen->has_msaa_sample_loc_bug = (sscreen->info.family >= CHIP_POLARIS10 &&
- sscreen->info.family <= CHIP_POLARIS12) ||
- sscreen->info.family == CHIP_VEGA10 ||
- sscreen->info.family == CHIP_RAVEN;
- sscreen->has_ls_vgpr_init_bug = sscreen->info.family == CHIP_VEGA10 ||
- sscreen->info.family == CHIP_RAVEN;
sscreen->use_ngg = sscreen->info.chip_class >= GFX10;
sscreen->use_ngg_streamout = sscreen->info.chip_class >= GFX10;
*/
sscreen->llvm_has_working_vgpr_indexing = sscreen->info.chip_class != GFX9;
- /* Some chips have RB+ registers, but don't support RB+. Those must
- * always disable it.
- */
- if (sscreen->info.family == CHIP_STONEY ||
- sscreen->info.chip_class >= GFX9) {
- sscreen->rbplus_allowed =
- !(sscreen->debug_flags & DBG(NO_RB_PLUS)) &&
- (sscreen->info.family == CHIP_STONEY ||
- sscreen->info.family == CHIP_VEGA12 ||
- sscreen->info.family == CHIP_RAVEN ||
- sscreen->info.family == CHIP_RAVEN2 ||
- sscreen->info.family == CHIP_RENOIR);
- }
-
sscreen->dcc_msaa_allowed =
!(sscreen->debug_flags & DBG(NO_DCC_MSAA));
- sscreen->cpdma_prefetch_writes_memory = sscreen->info.chip_class <= GFX8;
-
(void) mtx_init(&sscreen->shader_parts_mutex, mtx_plain);
sscreen->use_monolithic_shaders =
(sscreen->debug_flags & DBG(MONOLITHIC_SHADERS)) != 0;