* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
-#include <stdio.h>
-#include <errno.h>
-#include "pipe/p_defines.h"
-#include "pipe/p_state.h"
-#include "pipe/p_context.h"
-#include "tgsi/tgsi_scan.h"
-#include "tgsi/tgsi_parse.h"
-#include "tgsi/tgsi_util.h"
+
+#include "si_pipe.h"
+#include "si_public.h"
+
+#include "radeon/radeon_uvd.h"
#include "util/u_blitter.h"
-#include "util/u_double_list.h"
-#include "util/u_format.h"
-#include "util/u_transfer.h"
-#include "util/u_surface.h"
-#include "util/u_pack_color.h"
#include "util/u_memory.h"
-#include "util/u_inlines.h"
#include "util/u_simple_shaders.h"
-#include "util/u_upload_mgr.h"
#include "vl/vl_decoder.h"
-#include "vl/vl_video_buffer.h"
-#include "os/os_time.h"
-#include "pipebuffer/pb_buffer.h"
-#include "si_pipe.h"
-#include "radeon/radeon_uvd.h"
-#include "sid.h"
-#include "si_pipe.h"
-#include "si_state.h"
-#include "../radeon/r600_cs.h"
/*
* pipe_context
struct pipe_fence_handle **fence,
unsigned flags)
{
- si_flush(ctx, fence,
- flags & PIPE_FLUSH_END_OF_FRAME ? RADEON_FLUSH_END_OF_FRAME : 0);
+ struct si_context *sctx = (struct si_context *)ctx;
+ unsigned rflags = 0;
+
+ if (flags & PIPE_FLUSH_END_OF_FRAME)
+ rflags |= RADEON_FLUSH_END_OF_FRAME;
+
+ if (sctx->b.rings.dma.cs) {
+ sctx->b.rings.dma.flush(sctx, rflags);
+ }
+
+ si_flush(ctx, fence, rflags);
}
-static void si_flush_from_winsys(void *ctx, unsigned flags)
+static void si_flush_gfx_ring(void *ctx, unsigned flags)
{
si_flush((struct pipe_context*)ctx, NULL, flags);
}
pipe_resource_reference(&sctx->null_const_buf.buffer, NULL);
r600_resource_reference(&sctx->border_color_table, NULL);
+ si_pm4_delete_state(sctx, gs_rings, sctx->gs_rings);
+ si_pm4_delete_state(sctx, gs_onoff, sctx->gs_on);
+ si_pm4_delete_state(sctx, gs_onoff, sctx->gs_off);
+
if (sctx->dummy_pixel_shader) {
sctx->b.b.delete_fs_state(&sctx->b.b, sctx->dummy_pixel_shader);
}
sctx->b.b.delete_depth_stencil_alpha_state(&sctx->b.b, sctx->custom_dsa_flush_inplace);
sctx->b.b.delete_blend_state(&sctx->b.b, sctx->custom_blend_resolve);
sctx->b.b.delete_blend_state(&sctx->b.b, sctx->custom_blend_decompress);
- util_unreference_framebuffer_state(&sctx->framebuffer);
+ sctx->b.b.delete_blend_state(&sctx->b.b, sctx->custom_blend_fastclear);
+ util_unreference_framebuffer_state(&sctx->framebuffer.state);
util_blitter_destroy(sctx->blitter);
+ si_pm4_cleanup(sctx);
+
r600_common_context_cleanup(&sctx->b);
FREE(sctx);
}
{
struct si_context *sctx = CALLOC_STRUCT(si_context);
struct si_screen* sscreen = (struct si_screen *)screen;
+ struct radeon_winsys *ws = sscreen->b.ws;
int shader, i;
if (sctx == NULL)
sctx->b.b.create_video_buffer = vl_video_buffer_create;
}
- sctx->b.rings.gfx.cs = sctx->b.ws->cs_create(sctx->b.ws, RING_GFX, NULL);
- sctx->b.rings.gfx.flush = si_flush_from_winsys;
+ sctx->b.rings.gfx.cs = ws->cs_create(ws, RING_GFX, si_flush_gfx_ring,
+ sctx, NULL);
+ sctx->b.rings.gfx.flush = si_flush_gfx_ring;
si_init_all_descriptors(sctx);
sctx->atoms.cache_flush = &sctx->cache_flush;
sctx->atoms.streamout_begin = &sctx->b.streamout.begin_atom;
+ sctx->atoms.streamout_enable = &sctx->b.streamout.enable_atom;
switch (sctx->b.chip_class) {
case SI:
goto fail;
}
- sctx->b.ws->cs_set_flush_callback(sctx->b.rings.gfx.cs, si_flush_from_winsys, sctx);
-
sctx->blitter = util_blitter_create(&sctx->b.b);
if (sctx->blitter == NULL)
goto fail;
* with a NULL buffer). We need to use a dummy buffer instead. */
if (sctx->b.chip_class == CIK) {
sctx->null_const_buf.buffer = pipe_buffer_create(screen, PIPE_BIND_CONSTANT_BUFFER,
- PIPE_USAGE_STATIC, 16);
+ PIPE_USAGE_DEFAULT, 16);
sctx->null_const_buf.buffer_size = sctx->null_const_buf.buffer->width0;
for (shader = 0; shader < SI_NUM_SHADERS; shader++) {
case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
case PIPE_CAP_TGSI_VS_LAYER:
case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
+ case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
return 1;
case PIPE_CAP_TEXTURE_MULTISAMPLE:
return HAVE_LLVM >= 0x0304 && (sscreen->b.chip_class < CIK ||
sscreen->b.info.drm_minor >= 35);
- case PIPE_CAP_TGSI_TEXCOORD:
- return 0;
-
case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
- return 64;
+ return R600_MAP_BUFFER_ALIGNMENT;
case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
- return 256;
+ case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
+ return 4;
case PIPE_CAP_GLSL_FEATURE_LEVEL:
- return 140;
+ return HAVE_LLVM >= 0x0305 ? 330 : 140;
- case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
- return 1;
case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
return MIN2(sscreen->b.info.vram_size, 0xFFFFFFFF);
case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
case PIPE_CAP_USER_VERTEX_BUFFERS:
case PIPE_CAP_CUBE_MAP_ARRAY:
+ case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
+ case PIPE_CAP_TEXTURE_GATHER_SM5:
+ case PIPE_CAP_TGSI_TEXCOORD:
+ case PIPE_CAP_FAKE_SW_MSAA:
+ case PIPE_CAP_TEXTURE_QUERY_LOD:
return 0;
case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
return sscreen->b.has_streamout ? 32*4 : 0;
+ /* Geometry shader output. */
+ case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
+ return 1024;
+ case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
+ return 4095;
+
/* Texturing. */
case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
- case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
- return 15;
+ return 15; /* 16384 */
+ case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
+ /* textures support 8192, but layered rendering supports 2048 */
+ return 12;
case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
- return 16384;
- case PIPE_CAP_MAX_COMBINED_SAMPLERS:
- return 32;
+ /* textures support 8192, but layered rendering supports 2048 */
+ return 2048;
/* Render targets. */
case PIPE_CAP_MAX_RENDER_TARGETS:
case PIPE_CAP_QUERY_TIME_ELAPSED:
return sscreen->b.info.r600_clock_crystal_freq != 0;
+ case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
case PIPE_CAP_MIN_TEXEL_OFFSET:
return -8;
+ case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
case PIPE_CAP_MAX_TEXEL_OFFSET:
return 7;
case PIPE_CAP_ENDIANNESS:
case PIPE_SHADER_VERTEX:
break;
case PIPE_SHADER_GEOMETRY:
- /* TODO: support and enable geometry programs */
+#if HAVE_LLVM < 0x0305
return 0;
+#endif
+ break;
case PIPE_SHADER_COMPUTE:
switch (param) {
case PIPE_SHADER_CAP_PREFERRED_IR:
case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
return 0;
case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
+ /* Indirection of geometry shader input dimension is not
+ * handled yet
+ */
+ return shader < PIPE_SHADER_GEOMETRY;
case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
if (sscreen == NULL)
return;
- if (!radeon_winsys_unref(sscreen->b.ws))
+ if (!sscreen->b.ws->unref(sscreen->b.ws))
return;
r600_destroy_common_screen(&sscreen->b);
sscreen->b.b.get_param = si_get_param;
sscreen->b.b.get_shader_param = si_get_shader_param;
sscreen->b.b.is_format_supported = si_is_format_supported;
+ sscreen->b.b.resource_create = r600_resource_create_common;
if (!r600_common_screen_init(&sscreen->b, ws)) {
FREE(sscreen);
projects / mesa.git / blobdiff