unsigned flags)
{
struct si_context *sctx = (struct si_context *)ctx;
+ unsigned rflags = 0;
+
+ if (flags & PIPE_FLUSH_END_OF_FRAME)
+ rflags |= RADEON_FLUSH_END_OF_FRAME;
if (sctx->b.rings.dma.cs) {
- sctx->b.rings.dma.flush(sctx,
- flags & PIPE_FLUSH_END_OF_FRAME ? RADEON_FLUSH_END_OF_FRAME : 0);
+ sctx->b.rings.dma.flush(sctx, rflags);
}
- si_flush(ctx, fence,
- flags & PIPE_FLUSH_END_OF_FRAME ? RADEON_FLUSH_END_OF_FRAME : 0);
+ si_flush(ctx, fence, rflags);
}
-static void si_flush_from_winsys(void *ctx, unsigned flags)
+static void si_flush_gfx_ring(void *ctx, unsigned flags)
{
si_flush((struct pipe_context*)ctx, NULL, flags);
}
{
struct si_context *sctx = CALLOC_STRUCT(si_context);
struct si_screen* sscreen = (struct si_screen *)screen;
+ struct radeon_winsys *ws = sscreen->b.ws;
int shader, i;
if (sctx == NULL)
sctx->b.b.create_video_buffer = vl_video_buffer_create;
}
- sctx->b.rings.gfx.cs = sctx->b.ws->cs_create(sctx->b.ws, RING_GFX, NULL);
- sctx->b.rings.gfx.flush = si_flush_from_winsys;
+ sctx->b.rings.gfx.cs = ws->cs_create(ws, RING_GFX, si_flush_gfx_ring,
+ sctx, NULL);
+ sctx->b.rings.gfx.flush = si_flush_gfx_ring;
si_init_all_descriptors(sctx);
goto fail;
}
- sctx->b.ws->cs_set_flush_callback(sctx->b.rings.gfx.cs, si_flush_from_winsys, sctx);
-
sctx->blitter = util_blitter_create(&sctx->b.b);
if (sctx->blitter == NULL)
goto fail;
case PIPE_CAP_QUERY_TIME_ELAPSED:
return sscreen->b.info.r600_clock_crystal_freq != 0;
+ case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
case PIPE_CAP_MIN_TEXEL_OFFSET:
return -8;
+ case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
case PIPE_CAP_MAX_TEXEL_OFFSET:
return 7;
case PIPE_CAP_ENDIANNESS: